MCF5280CVM66 Freescale Semiconductor, MCF5280CVM66 Datasheet - Page 662

IC MPU 32BIT COLDF 256-MAPBGA

MCF5280CVM66

Manufacturer Part Number
MCF5280CVM66
Description
IC MPU 32BIT COLDF 256-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF528xr
Datasheet

Specifications of MCF5280CVM66

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
142
Program Memory Type
ROMless
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Controller Family/series
ColdFire
No. Of I/o's
150
Program Memory Size
2KB
Ram Memory Size
64KB
Cpu Speed
66.67MHz
Embedded Interface Type
CAN, I2C, SPI, UART
No. Of Pwm Channels
8
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Debug Support
The move-to-SR, STLDSR, and RTE instructions include an optional PST = 0x3 value, indicating an entry
into user mode. Additionally, if the execution of a RTE instruction returns the processor to emulator mode,
a multiple-cycle status of 0xD is signaled.
Similar to the exception processing mode, the stopped state (PST = 0xE) and the halted state (PST = 0xF)
display this status throughout the entire time the ColdFire processor is in the given mode.
30-44
Instruction
wdebug
stldsr.w
stop
rte
Table 30-24. PST/DDATA Specification for Supervisor-Mode Instructions
Operand Syntax
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
<ea>y
#imm
#imm
PST = 0x7, {PST = 0xB, DD = source operand}, {PST = 3}, { PST =0xB,
DD =source operand},
PST = 0x5, {[PST = 0x9AB], DD = target address}
PST = 0x1, {PST = 0xA, DD = destination operand, PST = 0x3}
PST = 0x1,
PST = 0xE
PST = 0x1, {PST = 0xB, DD = source, PST = 0xB, DD = source}
PST/DDATA
Freescale Semiconductor

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