SAK-TC1775-L40E BA Infineon Technologies, SAK-TC1775-L40E BA Datasheet - Page 53

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SAK-TC1775-L40E BA

Manufacturer Part Number
SAK-TC1775-L40E BA
Description
IC MCU 32BIT 40MHZ BGA-329
Manufacturer
Infineon Technologies
Series
TC17xxr
Datasheet

Specifications of SAK-TC1775-L40E BA

Core Processor
TriCore
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SDLM, SSC, UART/USART
Peripherals
POR, WDT
Number Of I /o
176
Program Memory Size
8KB (8K x 8)
Program Memory Type
ROM
Ram Size
73K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 2.75 V
Data Converters
A/D 32x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
329-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
SAKTC1775L40EBA
SP000012965
Preliminary
System Timer
The STM within the TC1775 is designed for global system timing applications requiring
both high precision and long range. The STM provides the following features:
• Free-running 56-bit counter
• All 56 bits can be read synchronously
• Different 32-bit portions of the 56-bit counter can be read synchronously
• Driven by clock
• Counting begins at power-on reset
• Continuous operation is not affected by any reset condition except power-on reset
The STM is an upward counter, running with the system clock frequency
enabled per default after reset, and immediately starts counting up. Other than via reset,
it is not possible to affect the contents of the timer during normal operation of the
application, it can only be read, but not written to. Depending on the implementation of
the clock control of the STM, the timer can optionally be disabled or suspended for
power-saving and debugging purposes via a clock control register.
The maximum clock period is 2
counts 57.1 years before overflowing. Thus, it is capable of continuously timing the entire
expected product life-time of a system without overflowing.
Figure 14
Data Sheet
PORST
f
Decoder
Address
STM
Control
Clock
Enable/
Disable
Block Diagram of the STM Module
f
STM
(identical with the system clock
00
00
H
H
TIM5
55
TIM4
56
TIM3
47
1/
f
TIM2
STM
49
TIM1
. At
39
TIM0
56-Bit System Timer
f
STM
31
CAP
TIM6
= 40 MHz, for example, the STM
f
SYS
23
)
15
STM Module
7
V1.2, 2002-05
MCA04795
f
SYS
TC1775
. It is

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