HD6413008VXI25 Renesas Electronics America, HD6413008VXI25 Datasheet - Page 609

• Manufacturer Part Number: HD6413008VXI25
• Description: MCU 3V 0K I-TEMP 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD6413008VXI25

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: PWM, WDT
• Number Of I /o: 35
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

TIOR0—Timer I/O Control Register 0
I / O control B2 to B0
Bit 6
IOB2
0
1
Read/Write:
Initial value:
I / O control A2 to A0
Bit 2
IOA2
0
1
Bit 5
IOB1
Bit:
0
1
0
1
Bit 1
IOA1
0
1
0
1
⎯
⎯
Bit 4
IOB0
7
1
0
1
0
1
0
1
0
1
Bit 0
IOA0
IOB2
R/W
0
1
0
1
0
1
0
1
6
0
GRB is an output
compare register
GRB is an input
capture register
IOB1
R/W
GRA is an output
compare register
GRA is an input
capture register
5
0
IOB0
R/W
4
0
⎯
⎯
No output at compare match
0 output at GRB compare match
1 output at GRB compare match
Output toggles at GRB compare match
(1 output on channel 2)
GRB captures rising edges of input
GRB captures falling edges of input
GRB captures both edges of input
3
1
Description
No output at compare match
0 output at GRA compare match
1 output at GRA compare match
Output toggles at GRA compare match
(1 output on channel 2)
GRA captures rising edges of input
GRA captures falling edges of input
GRB captures both edges of input
Rev.4.00 Aug. 20, 2007 Page 563 of 638
IOA2
R/W
H'FFF69
2
0
Description
Appendix B Internal I/O Registers
IOA1
R/W
1
0
IOA0
R/W
0
0
16-bit timer channel 0
(Initial value)
REJ09B0395-0400
(Initial value)