HD6413008VXI25 Renesas Electronics America, HD6413008VXI25 Datasheet - Page 147

• Manufacturer Part Number: HD6413008VXI25
• Description: MCU 3V 0K I-TEMP 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD6413008VXI25

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: PWM, WDT
• Number Of I /o: 35
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

6.1
The H8/3008 has an on-chip bus controller (BSC) that manages the external address space divided
into eight areas. The bus specifications, such as bus width and number of access states, can be set
independently for each area, enabling multiple memories to be connected easily.
The bus controller also has a bus arbitration function that controls the operation of the internal bus
masters⎯the CPU can release the bus to an external device.
6.1.1
The features of the bus controller are listed below.
• Manages external address space in area units
• Basic bus interface
• Idle cycle insertion
• Bus arbitration function
• Other features
⎯ Manages the external space as eight areas (0 to 7) of 128 kbytes in 1M-byte modes, or 2
⎯ Bus specifications can be set independently for each area
⎯ Chip select (CS
⎯ 8-bit access or 16-bit access can be selected for each area
⎯ Two-state access or three-state access can be selected for each area
⎯ Program wait states can be inserted for each area
⎯ Pin wait insertion capability is provided
⎯ An idle cycle can be inserted in case of an external read cycle between different areas
⎯ An idle cycle can be inserted when an external read cycle is immediately followed by an
⎯ A built-in bus arbiter grants the bus right to the CPU, or an external bus master
⎯ Choice of two address update modes
Mbytes in 16-Mbyte modes
external write cycle
Overview
Features
0
to CS
Section 6 Bus Controller
7
) can be output for areas 0 to 7
Rev.4.00 Aug. 20, 2007 Page 101 of 638
REJ09B0395-0400
6. Bus Controller