HD6413008VXI25 Renesas Electronics America, HD6413008VXI25 Datasheet - Page 24

• Manufacturer Part Number: HD6413008VXI25
• Description: MCU 3V 0K I-TEMP 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD6413008VXI25

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: PWM, WDT
• Number Of I /o: 35
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

9.2
9.3
9.4
9.5
9.6
9.7
Section 10 Programmable Timing Pattern Controller (TPC)
10.1 Overview........................................................................................................................... 283
Rev.4.00 Aug. 20, 2007 Page xxii of xliv
REJ09B0395-0400
9.1.3
9.1.4
Register Descriptions ........................................................................................................ 248
9.2.1
9.2.2
9.2.3
9.2.4
9.2.5
CPU Interface.................................................................................................................... 259
9.3.1
Operation .......................................................................................................................... 261
9.4.1
9.4.2
9.4.3
9.4.4
9.4.5
9.4.6
Interrupt ............................................................................................................................ 269
9.5.1
9.5.2
8-Bit Timer Application Example..................................................................................... 271
Usage Notes ...................................................................................................................... 272
9.7.1
9.7.2
9.7.3
9.7.4
9.7.5
9.7.6
9.7.7
9.7.8
9.7.9
10.1.1 Features................................................................................................................ 283
10.1.2 Block Diagram..................................................................................................... 284
10.1.3 Pin Configuration................................................................................................. 285
10.1.4 Register Configuration......................................................................................... 286
Pin Configuration................................................................................................. 246
Register Configuration......................................................................................... 247
Timer Counters (8TCNT) .................................................................................... 248
Time Constant Registers A (TCORA) ................................................................. 249
Time Constant Registers B (TCORB) ................................................................. 250
Timer Control Register (8TCR)........................................................................... 251
Timer Control/Status Registers (8TCSR) ............................................................ 254
8-Bit Registers ..................................................................................................... 259
8TCNT Count Timing.......................................................................................... 261
Compare Match Timing....................................................................................... 262
Input Capture Signal Timing ............................................................................... 263
Timing of Status Flag Setting .............................................................................. 264
Operation with Cascaded Connection.................................................................. 265
Input Capture Setting ........................................................................................... 268
Interrupt Sources.................................................................................................. 269
A/D Converter Activation.................................................................................... 270
Contention between 8TCNT Write and Clear...................................................... 272
Contention between 8TCNT Write and Increment .............................................. 273
Contention between TCOR Write and Compare Match ...................................... 274
Contention between TCOR Read and Input Capture ........................................... 275
Contention between Counter Clearing by Input Capture and Counter
Increment ............................................................................................................. 276
Contention between TCOR Write and Input Capture .......................................... 277
Contention between 8TCNT Byte Write and Increment in 16-Bit Count Mode
(Cascaded Connection) ........................................................................................ 278
Contention between Compare Matches A and B ................................................. 279
8TCNT Operation and Internal Clock Source Switchover .................................. 279
................................. 283