HD6413008VXI25 Renesas Electronics America, HD6413008VXI25 Datasheet - Page 219

• Manufacturer Part Number: HD6413008VXI25
• Description: MCU 3V 0K I-TEMP 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD6413008VXI25

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: PWM, WDT
• Number Of I /o: 35
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

7.8.2
Table 7.15 summarizes the registers of port B.
Table 7.15 Port B Registers
Address*
H'EE00A
H'FFFDA
Note:
Port B Data Direction Register (PBDDR): PBDDR is an 8-bit write-only register that can select
input or output for each pin in port B. When pins are used for TPC output, the corresponding
PBDDR bits must also be set.
For the method of selecting the pin functions, see table 7.16.
When port B functions as an input/output port, a pin in port B becomes an output port if the
corresponding PBDDR bit is set to 1, and an input port if this bit is cleared to 0.
PBDDR is a write-only register. Its value cannot be read. All bits return 1 when read.
PBDDR is initialized to H'00 by a reset and in hardware standby mode. In software standby mode
it retains its previous setting. Therefore, if a transition is made to software standby mode while
port B is functioning as an input/output port and a PBDDR bit is set to 1, the corresponding pin
maintains its output state.
Bit
Initial value
Read/Write
* Lower 20 bits of the address in advanced mode.
Register Descriptions
Name
Port B data direction register
Port B data register
PB DDR
7
W
7
0
PB DDR
6
W
6
0
PB DDR
5
W
5
0
Port B data direction 7 to 0
These bits select input or output for port B pins
PB DDR
Abbreviation
PBDR
PBDDR
4
W
4
0
Rev.4.00 Aug. 20, 2007 Page 173 of 638
PB DDR
3
W
3
0
PB DDR
R/W
W
R/W
2
W
2
0
PB DDR
Initial Value
H'00
H'00
REJ09B0395-0400
1
W
1
0
7. I/O Ports
PB DDR
0
W
0
0