HD6473837H Renesas Electronics America, HD6473837H Datasheet - Page 120

• Manufacturer Part Number: HD6473837H
• Description: IC H8 MCU OTP 60K 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Lr

Specifications of HD6473837H

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 5MHz
• Connectivity: SCI
• Peripherals: LCD, PWM
• Number Of I /o: 84
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: OTP
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

5.5.2
Subsleep mode is cleared by an interrupt (timer A, timer C, timer G, IRQ
WKP
Clearing by Interrupt: When an interrupt is requested, subsleep mode is cleared and interrupt
exception handling starts. Subsleep mode is not cleared if the I bit of CCR is set to 1 or the
particular interrupt is disabled in the interrupt enable register.
Clearing by RES Input: Clearing by RES pin is the same as for standby mode; see 5.3.2,
Clearing Standby Mode.
5.6
5.6.1
Subactive mode is entered from watch mode if a timer A, IRQ
requested while the LSON bit in SYSCR1 is set to 1. From subsleep mode, subactive mode is
entered if a timer A, timer C, timer G, IRQ
A transition to subactive mode does not take place if the I bit of CCR is set to 1 or the particular
interrupt is disabled in the interrupt enable register.
5.6.2
Subactive mode is cleared by a SLEEP instruction or by a input at the RES pin.
Clearing by SLEEP Instruction: If a SLEEP instruction is executed while the SSBY bit in
SYSCR1 is set to 1 and TMA3 bit in TMA is set to 1, subactive mode is cleared and watch mode
is entered. If a SLEEP instruction is executed while SSBY = 0 and LSON = 1 in SYSCR1 and
TMA3 = 1 in TMA, subsleep mode is entered. Direct transfer to active mode is also possible; see
5.8, Direct Transfer, below.
Clearing by RES Pin: Clearing by RES pin is the same as for standby mode; see Clearing by
RES pin in section 5.3.2, Clearing Standby Mode.
5.6.3
The operating frequency in subactive mode is set in bits SA1 and SA0 in SYSCR2. The choices
are
W
7
) or by a low input at the RES pin.
/2,
Clearing Subsleep Mode
Subactive Mode
Transition to Subactive Mode
Clearing Subactive Mode
Operating Frequency in Subactive Mode
W
/4, and
W
/8.
0
to IRQ
4
, or WKP
0
0
to WKP
, or WKP
7
interrupt is requested.
0
0
to WKP
to IRQ
4
7
, WKP
interrupt is
0
to
103