C8051F321R Silicon Laboratories Inc, C8051F321R Datasheet - Page 59

• Manufacturer Part Number: C8051F321R
• Description: IC 8051 MCU 16K FLASH 28MLP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F32xr

Specifications of C8051F321R

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 21
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: 336-1067-2

Comparator hysteresis is programmed using Bits3-0 in the Comparator Control Register CPTnCN (shown in
Figure 7.4 and Figure 7.7). The amount of negative hysteresis voltage is determined by the settings of the CPnHYN
bits. As shown in Figure 7.3, settings of 20, 10 or 5 mV of negative hysteresis can be programmed, or negative
hysteresis can be disabled. In a similar way, the amount of positive hysteresis is determined by the setting the
CPnHYP bits.
Comparator interrupts can be generated on both rising-edge and falling-edge output transitions. (For Interrupt enable
and priority control, see
parator falling-edge, and the CPnRIF flag is set to ‘1’ upon the Comparator rising-edge. Once set, these bits remain
set until cleared by software. The output state of the Comparator can be obtained at any time by reading the CPnOUT
bit. The Comparator is enabled by setting the CPnEN bit to ‘1’, and is disabled by clearing this bit to ‘0’.
(Programmed with CP0HYP Bits)
Positive Hysteresis Voltage
INPUTS
OUTPUT
VIN+
VIN-
CIRCUIT CONFIGURATION
Section “8.3. Interrupt Handler” on page
Positive Hysteresis
CP0-
CP0+
VIN+
VIN-
Disabled
V
OL
Figure 7.3. Comparator Hysteresis Plot
V
OH
+
_
CP0
Positive Hysteresis
Maximum
OUT
Negative Hysteresis
Rev. 1.1
Disabled
58.) The CPnFIF flag is set to ‘1’ upon a Com-
Negative Hysteresis
(Programmed by CP0HYN Bits)
Maximum
Negative Hysteresis Voltage
C8051F320/1
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