MC68HC908GP32CP Freescale Semiconductor, MC68HC908GP32CP Datasheet - Page 77

IC MCU 8MHZ 32K FLASH 40-DIP

MC68HC908GP32CP

Manufacturer Part Number
MC68HC908GP32CP
Description
IC MCU 8MHZ 32K FLASH 40-DIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908GP32CP

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
33
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
For Use With
M68EVB908GP32 - BOARD EVALUATION FOR HC908GP32
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC908GP32CP
Manufacturer:
ROCKWELL
Quantity:
201
Part Number:
MC68HC908GP32CP
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
4.4 Interrupts
4.4.1 Effects
MC68HC908GP32
MOTOROLA
MC68HC08GP32
PIN — External Reset Flag
COP — Computer Operating Properly Reset Bit
ILOP — Illegal Opcode Reset Bit
ILAD — Illegal Address Reset Bit
MODRST — Monitor Mode Entry Module Reset Bit
LVI — Low-Voltage Inhibit Reset Bit
An interrupt temporarily changes the sequence of program execution to
respond to a particular event. An interrupt does not stop the operation of
the instruction being executed, but begins when the current instruction
completes its operation.
An interrupt:
1 = External reset via RST pin since last read of SRSR
0 = POR or read of SRSR since last external reset
1 = Last reset caused by timeout of COP counter
0 = POR or read of SRSR
1 = Last reset caused by an illegal opcode
0 = POR or read of SRSR
1 = Last reset caused by an opcode fetch from an illegal address
0 = POR or read of SRSR
1 = Last reset caused by monitor mode entry when vector locations
0 = POR or read of SRSR
1 = Last reset caused by low-power supply voltage
0 = POR or read of SRSR
Saves the CPU registers on the stack. At the end of the interrupt,
the RTI instruction recovers the CPU registers from the stack so
that normal processing can resume.
Rev. 6
$FFFE and $FFFF are $FF after POR while IRQ = V
Resets and Interrupts
Resets and Interrupts
Technical Data
DD
Interrupts
75

Related parts for MC68HC908GP32CP