MC68HC908GP32CP Freescale Semiconductor, MC68HC908GP32CP Datasheet - Page 102

• Manufacturer Part Number: MC68HC908GP32CP
• Description: IC MCU 8MHZ 32K FLASH 40-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908GP32CP

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 33
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• For Use With: M68EVB908GP32 - BOARD EVALUATION FOR HC908GP32
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Break Module (BRK)
6.4.1 Flag Protection During Break Interrupts
6.4.2 CPU During Break Interrupts
6.4.3 TIM1 and TIM2 During Break Interrupts
6.4.4 COP During Break Interrupts
6.5 Low-Power Modes
6.5.1 Wait Mode
Technical Data
100
The BCFE bit in the SIM break flag control register (SBFCR) enables
software to clear status bits during the break state.
The CPU starts a break interrupt by:
The break interrupt begins after completion of the CPU instruction in
progress. If the break address register match occurs on the last cycle of
a CPU instruction, the break interrupt begins immediately.
A break interrupt stops the timer counters.
The COP is disabled during a break interrupt when V
the RST pin.
The WAIT and STOP instructions put the MCU in low power-
consumption standby modes.
If enabled, the break module is active in wait mode. In the break routine,
the user can subtract one from the return address on the stack if SBSW
is set.
writing logic 0 to it.
•
•
Loading the instruction register with the SWI instruction
Loading the program counter with $FFFC and $FFFD ($FEFC and
$FEFD in monitor mode)
See Section 3. Low-Power
Break Module (BRK)
MC68HC908GP32
Modes. Clear the SBSW bit by
•
MC68HC08GP32
TST
is present on
MOTOROLA
—
Rev. 6