MC68HC908GP32CP Freescale Semiconductor, MC68HC908GP32CP Datasheet - Page 76

• Manufacturer Part Number: MC68HC908GP32CP
• Description: IC MCU 8MHZ 32K FLASH 40-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908GP32CP

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 33
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• For Use With: M68EVB908GP32 - BOARD EVALUATION FOR HC908GP32
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Resets and Interrupts
4.3.3.5 Illegal Address Reset
4.3.4 SIM Reset Status Register
Technical Data
74
NOTE:
Address:
An illegal address reset is an internal reset caused by opcode fetch from
an unmapped address. An illegal address reset sets the ILAD bit in the
SIM reset status register.
A data fetch from an unmapped address does not generate a reset.
This read-only register contains flags to show reset sources. All flag bits
are automatically cleared following a read of the register. Reset service
can read the SIM reset status register to clear the register after power-
on reset and to determine the source of any subsequent reset.
The register is initialized on power-up as shown with the POR bit set and
all other bits cleared. During a POR or any other internal reset, the RST
pin is pulled low. After the pin is released, it will be sampled 32
CGMXCLK cycles later. If the pin is not above a V
PIN bit in the SRSR may be set in addition to whatever other bits are set.
Only a read of the SIM reset status register clears all reset flags. After
multiple resets from different sources without reading the register,
multiple flags remain set.
POR — Power-On Reset Flag
Read:
Write:
POR:
1 = Power-on reset since last read of SRSR
0 = Read of SRSR since last power-on reset
$FE01
POR
Bit 7
1
Figure 4-3. SIM Reset Status Register (SRSR)
Resets and Interrupts
= Unimplemented
PIN
6
0
COP
5
0
MC68HC908GP32
ILOP
4
0
ILAD
3
0
MODRST
•
IH
MC68HC08GP32
2
0
at that time, then the
LVI
1
0
MOTOROLA
—
Bit 0
Rev. 6
0
0