ADUC836BS Analog Devices Inc, ADUC836BS Datasheet - Page 58

• Manufacturer Part Number: ADUC836BS
• Description: IC ADC DUAL 16BIT W/MCU 52-MQFP
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC8xxr

Specifications of ADUC836BS

• Rohs Status: RoHS non-compliant
• Core Processor: 8052
• Core Size: 8-Bit
• Speed: 12.58MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: POR, PSM, PWM, Temp Sensor, WDT
• Number Of I /o: 34
• Program Memory Size: 62KB (62K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.25 V
• Data Converters: A/D 7x16b; D/A 1x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 52-MQFP, 52-PQFP

ADuC836
Mode 1: 8-Bit UART, Variable Baud Rate
Mode 1 is selected by clearing SM0 and setting SM1. Each data
byte (LSB first) is preceded by a start bit (0) and followed by a
stop bit (1).Therefore 10 bits are transmitted on TxD or received
on RxD.The baud rate can be set by Timer 1 or Timer 2 (or both).
Alternatively, a dedicated baud rate generator, Timer 3, is pro-
vided on-chip to generate high speed, very accurate baud rates.
Transmission is initiated by writing to SBUF. The “write to
SBUF” signal also loads a 1 (stop bit) into the ninth bit position
of the Transmit Shift Register. The data is output bit by bit until
the stop bit appears on TxD and the transmit interrupt flag (TI)
is automatically set, as shown in Figure 55.
Reception is initiated when a 1-to-0 transition is detected on
RxD. Assuming a valid start bit was detected, character reception
continues. The start bit is skipped and the eight data bits are
clocked into the serial port shift register. When all eight bits have
been clocked in, the following events occur:



If, and only if, the following conditions are met at the time, the
final shift pulse is generated:


If either of these conditions is not met, the received frame is
irretrievably lost and RI is not set.
Mode 2: 9-Bit UART with Fixed Baud Rate
Mode 2 is selected by setting SM0 and clearing SM1. In this mode,
the UART operates in 9-bit mode with a fixed baud rate.The baud
rate is fixed at Core_Clk/64 by default, although by setting the
SMOD bit in PCON, the frequency can be doubled to Core_Clk/32.
Eleven bits are transmitted or received, a start bit (0), eight data
bits, a programmable ninth bit, and a stop bit (1).The ninth bit
is most often used as a parity bit, although it can be used for any-
thing, including a ninth data bit if required.
*f
CORE
(SCON.1)
The eight bits in the Receive Shift Register are latched into
SBUF.
The ninth bit (stop bit) is clocked into RB8 in SCON.
The Receiver Interrupt flag (RI) is set.
RI = 0, and
Either SM2 = 0, or SM2 = 1 and the Received Stop Bit = 1.
Figure 55. UART Serial PortTransmission, Mode 0
refers to the output of the PLL as described in the On-Chip PLL section.
TxD
TI
START
BIT
D0
D1
D2
D3
D4
D5
D6
i.e., READY FOR MORE
SET INTERRUPT
D7
DATA
STOP BIT
–58–
To transmit, the eight data bits must be written into SBUF. The
ninth bit must be written to TB8 in SCON. When transmission
is initiated, the eight data bits (from SBUF) are loaded onto the
transmit shift register (LSB first). The contents of TB8 are loaded
into the ninth bit position of the transmit shift register.
The transmission will start at the next valid baud rate clock. The
TI flag is set as soon as the stop bit appears on TxD.
Reception for Mode 2 is similar to that of Mode 1. The eight data
bytes are input at RxD (LSB first) and loaded onto the Receive
Shift Register. When all eight bits have been clocked in, the fol-
lowing events occur:



If, and only if, the following conditions are met at the time the
final shift pulse is generated:


If either of these conditions is not met, the received frame is
irretrievably lost and RI is not set.
Mode 3: 9-Bit UART with Variable Baud Rate
Mode 3 is selected by setting both SM0 and SM1. In this mode,
the 8051 UART serial port operates in 9-bit mode with a variable
baud rate determined by either Timer 1 or Timer 2.The operation
of the 9-bit UART is the same as for Mode 2, but the baud rate
can be varied as for Mode 1.
In all four modes, transmission is initiated by any instruction
that uses SBUF as a destination register. Reception is initiated in
Mode 0 by the condition RI = 0 and REN = 1. Reception is initi-
ated in the other modes by the incoming start bit if REN = 1.
UART Serial Port Baud Rate Generation
Mode 0 Baud Rate Generation
The baud rate in Mode 0 is fixed:
Mode 2 Baud Rate Generation
The baud rate in Mode 2 depends on the value of the SMOD bit
in the PCON SFR. If SMOD = 0, the baud rate is 1/64 of the
core clock. If SMOD = 1, the baud rate is 1/32 of the core clock:
Mode 1 and 3 Baud Rate Generation
Traditionally, the baud rates in Modes 1 and 3 are determined by
the overflow rate in Timer 1 or Timer 2, or both (one for transmit
and the other for receive). On the ADuC836, however, the baud
rate can also be generated via a separate baud rate generator to
achieve higher baud rates and allow all three to be used for other
functions.
The eight bits in the Receive Shift Register are latched into
SBUF.
The ninth data bit is latched into RB8 in SCON.
The Receiver Interrupt flag (RI) is set.
RI = 0, and
Either SM2 = 0, or SM2 = 1 and the received stop bit = 1.
Mode 2 Baud Rate
Mode 0 Baud Rate
=
f
CORE
=
f
CORE
*
12
64
×
2
*
SMOD
REV. A