PIC16C745/JW Microchip Technology, PIC16C745/JW Datasheet - Page 84
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PIC16C745/JW
Manufacturer Part Number
PIC16C745/JW
Description
IC MCU EPROM8KX14 USB A/D 28CDIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16C745-ISP.pdf
(165 pages)
3.PIC16C745-ISP.pdf
(6 pages)
4.PIC16C745-ISP.pdf
(6 pages)
Specifications of PIC16C745/JW
Core Processor
PIC
Core Size
8-Bit
Speed
24MHz
Connectivity
SCI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
14KB (8K x 14)
Program Memory Type
EPROM, UV
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4.35 V ~ 5.25 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
28-CDIP (0.300", 7.62mm) Window
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16C745/JW
Manufacturer:
MICROCHIP
Quantity:
51
Part Number:
PIC16C745/JW
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC16C745/765
Steps to follow when setting up an Asynchronous
Reception:
1.
2.
3.
4.
5.
TABLE 11-7:
DS41124C-page 84
Address
0Ch
18h
1Ah
8Ch
98h
99h
Legend: x = unknown, - = unimplemented locations read as '0'. Shaded cells are not used for asynchronous reception.
Note 1: Bits PSPIE and PSPIF are reserved on the PIC16C745; always maintain these bits clear.
Initialize the SPBRG register for the appropriate
baud rate. If a high speed baud rate is desired,
set bit BRGH. (Section 11.1).
Enable the asynchronous serial port by clearing
bit SYNC, and setting bit SPEN.
If interrupts are desired, then set enable bit
RCIE.
If 9-bit reception is desired, then set bit RX9.
Enable the reception by setting bit CREN.
PIR1
RCSTA
RCREG USART Receive Register
PIE1
TXSTA
SPBRG Baud Rate Generator Register
Name
REGISTERS ASSOCIATED WITH ASYNCHRONOUS RECEPTION
PSPIE
PSPIF
SPEN
CSRC
Bit 7
(1)
(1)
ADIE
Bit 6
ADIF
RX9
TX9
SREN
TXEN
RCIE
RCIF
Bit 5
CREN
SYNC
Bit 4
TXIF
TXIE
Preliminary
USBIF CCP1IF
USBIE CCP1IE TMR2IE
Bit 3
—
—
6.
7.
8.
9.
BRGH
FERR
Bit 2
Flag bit RCIF will be set when reception is com-
plete and an interrupt will be generated if enable
bit RCIE was set.
Read the RCSTA register to get the ninth bit (if
enabled) and determine if any error occurred
during reception.
Read the 8-bit received data by reading the
RCREG register.
If any error occurred, clear the error by clearing
enable bit CREN.
TMR2IF
OERR
TRMT
Bit 1
TMR1IE
TMR1IF
RX9D
TX9D
Bit 0
2000 Microchip Technology Inc.
0000 0000
0000 -00x
0000 0000
0000 0000
0000 -010
0000 0000
Value on:
POR,
BOR
0000 0000
0000 -00x
0000 0000
0000 0000
0000 -010
0000 0000
Value on
all other
Resets