UPD78F1211MC-GAA-AX Renesas Electronics America, UPD78F1211MC-GAA-AX Datasheet - Page 720

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UPD78F1211MC-GAA-AX

Manufacturer Part Number
UPD78F1211MC-GAA-AX
Description
MCU 16BIT 78K0R/LX3 38-SSOP
Manufacturer
Renesas Electronics America
Series
78K0R/Ix3r
Datasheet

Specifications of UPD78F1211MC-GAA-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
40MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
27
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
718
Notes 1. The baud rate is set so as to satisfy the standard of the wakeup signal and data of 00H is transmitted.
Remark
LIN Bus
(output)
INTST0
T
X
D0
2. A sync break field is defined to have a width of 13 bits and output a low level. Where the baud rate for
3. INTST0 is output upon completion of transmission. INTST0 is also output when SBF transmission is
Note 3
main transfer is N [bps], therefore, the baud rate of the sync break field is calculated as follows.
By transmitting data of 00H at this baud rate, a sync break field is generated.
executed.
The interval between fields is controlled by software.
(Baud rate of sync break field) = 9/13 × N
Wakeup signal
8 bits
frame
Note 1
Figure 13-85. Transmission Operation of LIN
transmission
13-bit SBF
Sync break
CHAPTER 13 SERIAL ARRAY UNIT
field
User’s Manual U19678EJ1V1UD
Note 2
transmission
Sync field
55H
Identification
transmission
Data
field
transmission
Data field
Data
transmission
Data field
Data
transmission
Checksum
Data
field

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