UPD78F1211MC-GAA-AX Renesas Electronics America, UPD78F1211MC-GAA-AX Datasheet - Page 299

• Manufacturer Part Number: UPD78F1211MC-GAA-AX
• Description: MCU 16BIT 78K0R/LX3 38-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1211MC-GAA-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 27
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Address: F01BCH, F01BDH
(11) Timer output level register 0 (TOL0)
Symbol
TOL0
TOL0 is a register that controls the timer output level of each channel.
The setting of the inverted output of channel n by this register is reflected at the timing of set or reset of the
timer output signal while the timer output is enabled (TOEn = 1) in the slave channel output mode (TOMn = 1)
and triangular wave PWM output with dead time off (TDEn = 0). In the master channel output mode (TOMn =
0), this register setting is invalid.
TOL0 can be set by a 16-bit memory manipulation instruction.
Reset signal generation clears this register to 0000H.
Notes 1.
Caution Be sure to clear bits 15 to 12 to “0”.
Remarks 1. If the value of this register is rewritten during timer operation, the timer output is inverted when
TOL
2.
15
n
0
1
0
2. n = 00 to 11
These settings are used with the inverter control function. For the inverter control function, refer to
CHAPTER 7 INVERTER CONTROL FUNCTIONS.
When using triangular wave PWM output with dead time or 6-phase triangular wave PWM output,
do not rewrite the TOL0 register while the timer is operating. If the TOL0 register is rewritten while
the timer is operating, the waveform output from TOn during the rewritten PWM cycle will be
irregular. Note, however, that this does not occur when using complementary modulation output.
(For details, see CHAPTER 7 INVERTER CONTROL FUNCTIONS.)
Positive logic output (active-high)
Adds dead time to the positive logic side when TDEn = 1 of the timer dead time output enable register 0
(TDE0) is 1
Inverted output (active-low)
Adds dead time to the inverted logic side when TDEn = 1 of the timer dead time output enable register 0
(TDE0) is 1
14
the timer output signal changes next, instead of immediately after the register value is rewritten.
0
Figure 6-20. Format of Timer Output Level Register 0 (TOL0)
13
After reset: 0000H
0
Note
Note
.
.
12
0
CHAPTER 6 TIMER ARRAY UNIT TAUS
TOL
11
11
User’s Manual U19678EJ1V1UD
TOL
R/W
10
10
Control of timer output level of channel n
TOL
09
9
TOL
08
8
TOL
07
7
TOL
06
6
TOL
05
5
TOL
04
4
TOL
03
3
TOL
02
2
TOL
01
1
TOL
00
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0