UPD78F0513AGA-GAM-AX Renesas Electronics America, UPD78F0513AGA-GAM-AX Datasheet - Page 448

• Manufacturer Part Number: UPD78F0513AGA-GAM-AX
• Description: MCU 8BIT 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0513AGA-GAM-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 41
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
14.4.3 Dedicated baud rate generator
generates a serial clock for transmission/reception of UART0.
(1) Configuration of baud rate generator
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
The dedicated baud rate generator consists of a source clock selector and a 5-bit programmable counter, and
Separate 5-bit counters are provided for transmission and reception.
• Base clock
• Transmission counter
• Reception counter
The clock selected by bits 7 and 6 (TPS01 and TPS00) of baud rate generator control register 0 (BRGC0) is
supplied to each module when bit 7 (POWER0) of asynchronous serial interface operation mode register 0
(ASIM0) is 1. This clock is called the base clock and its frequency is called f
low level when POWER0 = 0.
This counter stops operation, cleared to 0, when bit 7 (POWER0) or bit 6 (TXE0) of asynchronous serial interface
operation mode register 0 (ASIM0) is 0.
It starts counting when POWER0 = 1 and TXE0 = 1.
The counter is cleared to 0 when the first data transmitted is written to transmit shift register 0 (TXS0).
This counter stops operation, cleared to 0, when bit 7 (POWER0) or bit 5 (RXE0) of asynchronous serial interface
operation mode register 0 (ASIM0) is 0.
It starts counting when the start bit has been detected.
The counter stops operation after one frame has been received, until the next start bit is detected.
Remark POWER0: Bit 7 of asynchronous serial interface operation mode register 0 (ASIM0)
event counter
8-bit timer/
50 output
TXE0:
RXE0:
BRGC0:
f
f
PRS
PRS
f
PRS
/2
/2
/2
5
3
BRGC0: TPS01, TPS00
Bit 6 of ASIM0
Baud rate generator control register 0
Bit 5 of ASIM0
Figure 14-11. Configuration of Baud Rate Generator
POWER0
Selector
f
XCLK0
POWER0, TXE0 (or RXE0)
BRGC0: MDL04 to MDL00
Match detector
5-bit counter
Baud rate generator
CHAPTER 14 SERIAL INTERFACE UART0
1/2
XCLK0
. The base clock is fixed to
Baud rate
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