M37632EFFP#U2 Renesas Electronics America, M37632EFFP#U2 Datasheet - Page 25

• Manufacturer Part Number: M37632EFFP#U2
• Description: IC 740 MCU 80QFP
• Manufacturer: Renesas Electronics America

Specifications of M37632EFFP#U2

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

INSTRUCTIONS
Rev.2.00 Nov 14, 2006
REJ09B0322-0200
Addressing mode :
Instructions :
(A)← (A) + (C) + XX
Function :
Assuming that “00
Example :
designation
page 17 of 185
Absolute
Indirect X
Specifies the contents in a memory location as the
data for the instruction. The address in the memory
location is determined by the following:
(a) A Zero Page memory location is determined by the
(b) The result of the addition is used as the low-order
(c) The contents of the address in the Zero Page
(d) The next Zero Page memory location is used as
ADC, AND, CMP, EOR, LDA, ORA, SBC, STA
Mnemonic
16
adding the Operand and Index Register X (if as a
result of this addition a carry occurs, it is ignored).
byte of an address in the Zero Page memory
location and 00
memory location is used as the low-order byte of
the address in the memory location.
the high-order byte of the address in the memory
location.
” for Data I, and “14
16
∆ ∆ ∆ ∆ ∆ ADC∆ ∆ ∆ ∆ ∆ ($1E,X)
Indirect X
Operand (1E
Op-code (61
Data II (14
Data I (00
Data(XX
Zero page
Memory
16
” for Data ll are stored in advance.
16
16
16
16
as the high-order byte.
)
16
16
)
)
)
)
1400
00
04
05
FF
+ E6
16
16
16
Machine code
16
16
16
= 1 04
Zero page X
61
designation
Contents of Index
16
Register X
Addressing mode
16
Ignored
1E
16