M37632EFFP#U2 Renesas Electronics America, M37632EFFP#U2 Datasheet - Page 18

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M37632EFFP#U2

Manufacturer Part Number
M37632EFFP#U2
Description
IC 740 MCU 80QFP
Manufacturer
Renesas Electronics America
Datasheet

Specifications of M37632EFFP#U2

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
INSTRUCTIONS
Rev.2.00 Nov 14, 2006
REJ09B0322-0200
Addressing mode :
Instructions :
(A) ← (A) + (C) + XX
Function :
Example :
page 10 of 185
Zero Page X
Specified the contents in a Zero Page memory
location as the data for the instruction. The address
in the Zero Page memory location is determined by
the following:
(a) Operand and the Index Register X are added. (If as
(b) The result of the addition is used as the low-order
ADC, AND, ASL, CMP, DEC, DIV, EOR, INC, LDA, LDY,
LSR, MUL, ORA, ROL, ROR, SBC, STA, STY
Mnemonic
16
a result of this addition a carry occurs, it is
ignored.)
byte of the address and 00
byte.
∆ ∆ ∆ ∆ ∆ ADC∆ ∆ ∆ ∆ ∆ $5E,X
Zero Page X
O p e r a n d ( 5 E
Op-code (75
D a t a ( X X
Z e r o p a g e
M e m o r y
1 6
)
16
1 6
)
)
0 0
4 4
+ E 6
FF
C o n t e n t s o f I n d e x R e g i s t e r X
1 6
1 6
16
1 6
Machine code
= 1 4 4
Z e r o p a g e X
d e s i g n a t i o n
16
75
I g n o r e d
1 6
16
as the high-order
Addressing mode
5E
16

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