M37632EFFP#U2 Renesas Electronics America, M37632EFFP#U2 Datasheet - Page 118

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M37632EFFP#U2

Manufacturer Part Number
M37632EFFP#U2
Description
IC 740 MCU 80QFP
Manufacturer
Renesas Electronics America
Datasheet

Specifications of M37632EFFP#U2

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
NOTES ON USE
Fig. 4.4.4 Contents of stack memory in interrupt processing routine
Rev.2.00 Nov 14, 2006
REJ09B0322-0200
4.4.2 BRK instruction
(1) Method detecting interrupt source
(2) Interrupt priority level
4.4.3 Decimal calculations
(1) Execution of Decimal calculations
At the following status,
If the BRK instruction is executed, the interrupt disable state is cancelled and it becomes
in the interrupt enable state. So that the requested interrupts (the interrupts that corresponding
to their request bits have set to “1”) are accepted.
It can be detected that the BRK instruction interrupt event or the least priority interrupt
event by referring the stored B flag state. Refer the stored B flag state in the interrupt
routine, in this case.
The ADC and SBC are the only instructions which will yield proper decimal results in
decimal mode. To calculate in decimal notation, set the decimal mode flag (D) to “1” with
the SED instruction. After executing the ADC or SBC instruction, execute another instruction
before executing the SEC, CLC, or CLD instruction.
the interrupt request bit has set to “1.”
the interrupt enable bit has set to “1.”
the interrupt disable flag (I) has set to “1.”
page 110 of 185
(S) + 1
(S) + 2
(S) + 3
(S)
7
PC
PC
H
L
(program counter high-order)
(program counter low-order)
4
1
= B flag
0
PS

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