HD6417750SF200V Renesas Electronics America, HD6417750SF200V Datasheet - Page 928

• Manufacturer Part Number: HD6417750SF200V
• Description: MPU 3V 16K PB-FREE 208-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417750SF200V

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 28
• Program Memory Type: ROMless
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 2.07 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 19 Interrupt Controller (INTC)
19.3.6
The interrupt mask clear register 00 (INTMSKCLR00) clears the masking of individual interrupt
requests. INTMSKCLR00 is a 32-bit write-only register.
Initial value:
Initial value:
Bit 31 to 0⎯Interrupt Mask Clear: Each bit selects whether or not to clear the masking of the
interrupt source that corresponds to that bit. For the correspondence between the bits and interrupt
sources, see section 19.3.7, Bit Assignments of INTREQ00, INTMSK00, and INTMSKCLR00
(SH7750R Only).
Bits 31 to 0
0
1
19.3.7
The relationship between the bits in these registers and interrupt sources is as shown below.
Table 19.8 Bit Assignments
Bit number
31 to 10, 7 to 0
9
8
Rev.7.00 Oct. 10, 2008 Page 842 of 1074
REJ09B0366-0700
R/W:
R/W:
Bit:
Bit:
Interrupt Mask Clear Register 00 (INTMSKCLR00) (SH7750R Only)
Bit Assignments of INTREQ00, INTMSK00, and INTMSKCLR00
(SH7750R Only)
31
15
—
—
W
W
30
—
14
—
W
W
29
13
—
—
W
W
Description
Masking of interrupt requests from the source that corresponds to the
bit is not changed
Masking of interrupt requests from the source that corresponds to the
bit is cleared
28
12
—
—
W
W
Module
TMU
TMU
Reserved
27
11
—
W
—
W
26
10
—
—
W
W
25
—
—
W
W
9
24
—
W
—
W
8
23
—
W
—
W
7
22
—
—
W
W
6
Interrupt
Reserved
TUNI4
TUNI3
21
—
W
—
W
5
20
—
—
W
W
4
19
—
—
W
W
3
18
—
W
—
W
2
17
—
—
W
W
1
16
—
—
W
W
0