HD6417750SF200V Renesas Electronics America, HD6417750SF200V Datasheet - Page 847

• Manufacturer Part Number: HD6417750SF200V
• Description: MPU 3V 16K PB-FREE 208-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417750SF200V

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 28
• Program Memory Type: ROMless
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 2.07 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Figure 16.6 shows a sample SCIF initialization flowchart.
Clear TFRST and RFRST bits to 0
and set RIE, TIE, and REIE bits
Set TFRST and RFRST bits
Set transmit/receive format
Set RTRG1–0, TTRG1–0,
Set CKE1 bit in SCSCR2
and MCE bits in SCFCR2
(leaving TE and RE bits
1-bit interval elapsed?
Set value in SCBRR2
Clear TE and RE bits
Set TE and RE bits
in SCSCR2 to 1,
in SCSCR2 to 0
in SCFCR2 to 1
cleared to 0)
Initialization
in SCSMR2
End
Yes
Figure 16.6 Sample SCIF Initialization Flowchart
Wait
Section 16 Serial Communication Interface with FIFO (SCIF)
No
Rev.7.00 Oct. 10, 2008 Page 761 of 1074
1. Set the clock selection in SCSCR2.
2. Set the transmit/receive format in
3. Write a value corresponding to the
4. Wait at least one bit interval, then
Be sure to clear bits RIE and TIE,
and bits TE and RE, to 0.
SCSMR2.
bit rate into SCBRR2. (Not
necessary if an external clock is
used.)
set the TE bit or RE bit in SCSCR2
to 1. Also set the RIE, REIE, and
TIE bits.
Setting the TE and RE bits enables
the TxD2 and RxD2 pins to be
used. When transmitting, the SCIF
will go to the mark state; when
receiving, it will go to the idle state,
waiting for a start bit.
REJ09B0366-0700