HD6417727F160CV Renesas Electronics America, HD6417727F160CV Datasheet - Page 431

• Manufacturer Part Number: HD6417727F160CV
• Description: IC SH MPU ROMLESS 240QFN
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727F160CV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 160MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.7 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

13.1.7
The individual memory control register (MCR) is a 16-bit read/write register that specifies RAS
and CAS timing and burst control for synchronous DRAM (areas 2 and 3), specifies address
multiplexing, and controls refresh. This enables direct connection of synchronous DRAM without
external circuits.
The MCR is initialized to H'0000 by power-on resets, but is not initialized by manual resets or
standby mode. The bits TPC1 to TPC0, RCD1 to RCD0, TRWL1 to TRWL0, TRAS1 to TRAS0,
and AMX3 to AMX0 are written to at the initialization after a power-on reset and should not be
modified again. When RFSH and RMODE are written to, write the same values to the other bits.
When using synchronous DRAM, do not access areas 2 and 3 until this register initialization is
complete.
Bits 15 and 14—RAS Precharge Time (TPC1, TPC0): When synchronous DRAM interface is
selected, these bits set the minimum number of cycles until output of the next bank-active
command after precharge.
Bit 15: TPC1
0
1
Initial value:
Initial value:
Individual Memory Control Register (MCR)
R/W:
R/W:
Bit:
Bit:
Bit 14: TPC0
0
1
0
1
TPC1
R/W
R/W
15
—
0
7
0
AMX3
TPC0
R/W
R/W
14
0
6
0
1 cycle
2 cycles
3 cycles
4 cycles
Description
RCD1
AMX2
R/W
R/W
13
0
5
0
RCD0
AMX1
R/W
R/W
12
0
4
0
Rev.6.00 Mar. 27, 2009 Page 373 of 1036
Section 13 Li Bus State Controller (LBSC)
TRWL1 TRWL0
AMX0
R/W
R/W
11
0
3
0
RFSH
R/W
R/W
10
0
2
0
REJ09B0254-0600
RMODE
TRAS1
R/W
R/W
9
0
1
0
(Initial value)
TRAS0
R/W
R/W
—
8
0
0
0