HD6417727F160CV Renesas Electronics America, HD6417727F160CV Datasheet - Page 142

• Manufacturer Part Number: HD6417727F160CV
• Description: IC SH MPU ROMLESS 240QFN
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727F160CV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 160MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.7 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 2 CPU
Table 2.28 Single Data Transfer Instructions
Instruction
MOVS.W @-As,Ds
MOVS.W @As,Ds
MOVS.W @As+,Ds
MOVS.W @As+Ix,Ds
MOVS.W Ds,@-As*
MOVS.W Ds,@As*
MOVS.W Ds,@As+*
MOVS.W Ds,@As+Ix* 111101AADDDD1101
MOVS.L @-As,Ds
MOVS.L @As,Ds
MOVS.L @As+,Ds
MOVS.L @As+Ix,Ds
MOVS.L Ds,@-As
MOVS.L Ds,@As
MOVS.L Ds,@As+
MOVS.L Ds,@As+Ix
Note: * If guard bit registers A0G and A1G are specified in source operand Ds, the data is output
Rev.6.00 Mar. 27, 2009 Page 84 of 1036
REJ09B0254-0600
to the LDB[7:0] bus and the sign bit is copied into the upper bits, [31:8].
Instruction Code
111101AADDDD0000
111101AADDDD0100
111101AADDDD1000
111101AADDDD1100
111101AADDDD0001
111101AADDDD0101
111101AADDDD1001
111101AADDDD0010
111101AADDDD0110
111101AADDDD1010
111101AADDDD1110
111101AADDDD0011
111101AADDDD0111
111101AADDDD1011
111101AADDDD1111
Operation
As – 2 → As, (As) →
MSW of Ds, 0 → LSW of Ds
(As) → MSW of Ds,
0 → LSW of Ds
(As) → MSW of Ds,
0 → LSW of Ds, As + 2 → As
(Asc) → MSW of Ds,
0 → LSW of Ds, As + Ix → As
As – 2 → As,
MSW of Ds → (As)
MSW of Ds → (As)
MSW of Ds → (As),
As + 2 → As
MSW of Ds → (As),
As + Ix → As
As – 4 → As, (As) → Ds
(As) → Ds
(As) → Ds, As + 4 → As
(As) → Ds, As + Ix → As
As – 4 → As, Ds → (As)
Ds → (As)
Ds → (As), As + 4 → As
Ds → (As), As + Ix → As
Execu-
tion
States
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
DC
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—