DF2378RVFQ34WV Renesas Electronics America, DF2378RVFQ34WV Datasheet - Page 333

MCU 3V 512K I-TEMP PB-FREE 144-L

DF2378RVFQ34WV

Manufacturer Part Number
DF2378RVFQ34WV
Description
MCU 3V 512K I-TEMP PB-FREE 144-L
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of DF2378RVFQ34WV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
34MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
97
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 6x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
For Use With
YLCDRSK2378 - KIT DEV EVAL H8S/2378 LCDYR0K42378FC000BA - KIT EVAL FOR H8S/2378HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK2378 - DEV EVAL KIT FOR H8S/2378
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Previous Access
Note:
Setting the DRMI bit in DRACCR to 1 enables an idle cycle to be inserted in the case of
consecutive read and write operations in DRAM/continuous synchronous DRAM space burst
access. Figures 6.81 and 6.82 show an example of the timing for idle cycle insertion in the case of
consecutive read and write accesses to DRAM/continuous synchronous DRAM space.
Normal space write
DRAM/continuous
synchronous DRAM *
space write
* Not supported by the H8S/2378 Group.
Next Access
Normal space read
DRAM * /continuous
synchronous DRAM
space read
Normal space read
DRAM * /continuous
synchronous DRAM
space read
ICIS2
0
1
0
1
0
1
0
1
ICIS1
Rev.7.00 Mar. 18, 2009 page 265 of 1136
ICIS0
Section 6 Bus Controller (BSC)
DRMI
IDLC
0
1
0
1
0
1
0
1
REJ09B0109-0700
Idle cycle
Disabled
1 state inserted
2 states inserted
Disabled
1 state inserted
2 states inserted
Disabled
1 state inserted
2 states inserted
Disabled
1 state inserted
2 states inserted

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