HD6417034AFI20V Renesas Electronics America, HD6417034AFI20V Datasheet - Page 60

• Manufacturer Part Number: HD6417034AFI20V
• Description: MCU 5V 0K I-TEMP PB-FREE 112-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7030r

Specifications of HD6417034AFI20V

• Core Processor: SH-1
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 2 CPU
Classifi-
cation
Logic oper- 6
ations
(cont)
Shift
Branch
System
control
Total
Rev. 7.00 Jan 31, 2006 page 32 of 658
REJ09B0272-0700
Types
10
7
11
56
Operation
Code
TST
XOR
ROTL
ROTR
ROTCL
ROTCR
SHAL
SHAR
SHLL
SHLLn
SHLR
SHLRn
BF
BT
BRA
BSR
JMP
JSR
RTS
CLRT
CLRMAC
LDC
LDS
NOP
RTE
SETT
SLEEP
STC
STS
TRAPA
Function
Logical AND and T bit set
Exclusive OR
One-bit left rotation
One-bit right rotation
One-bit left rotation with T bit
One-bit right rotation with T bit
One-bit arithmetic left shift
One-bit arithmetic right shift
One-bit logical left shift
n-bit logical left shift
One-bit logical right shift
n-bit logical right shift
Conditional branch (T = 0)
Conditional branch (T = 1)
Unconditional branch
Branch to subroutine procedure
Unconditional branch
Branch to subroutine procedure
Return from subroutine procedure
T bit clear
MAC register clear
Load to control register
Load to system register
No operation
Return from exception handling
T bit set
Shift into power-down mode
Store control register data
Store system register data
Trap exception handling
7
31
Number of
Instructions
14
14
133