HD6417034AFI20V Renesas Electronics America, HD6417034AFI20V Datasheet - Page 171

MCU 5V 0K I-TEMP PB-FREE 112-QFP

HD6417034AFI20V

Manufacturer Part Number
HD6417034AFI20V
Description
MCU 5V 0K I-TEMP PB-FREE 112-QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7030r
Datasheet

Specifications of HD6417034AFI20V

Core Processor
SH-1
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417034AFI20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
For CPU write cycles and DMAC dual mode write cycles to external memory space, the number
of states and wait state insertion cannot be controlled by WCR1. In areas 1, 3, 4, 5, and 7, the
WAIT signal is sampled and the number of states is 2 plus the number of wait states set by the
WAIT signal (figure 8.13). In areas 0, 2 and 6, the number of states is 1 state plus the number of
long wait states plus the number of wait states set by the WAIT signal (figure 8.14). Do not write
0 in bits 7–2 and 0 of WCR1; only write 1. When area 1 is being used as external memory space,
do not write 0 in bit 1 (WW1); always write 1.
Figure 8.14 Wait State Timing for External Memory Space Access (1 State Plus Long Wait
Write
Read
WRH, WRL
State (When Set to Insert 3 States) Plus Wait States from WAIT
AD15–AD0
AD15–AD0
A21–A0
WAIT
CSn
RD
CK
T1
T
LW1
set in WCR3
Wait states
T
LW2
Rev. 7.00 Jan 31, 2006 page 143 of 658
Section 8 Bus State Controller (BSC)
signal input
from WAIT
Wait state
T
W
WAIT
WAIT
WAIT Signal)
states set
in WCR3
Wait
T
REJ09B0272-0700
LW3

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