D12674RVFQ33D Renesas Electronics America, D12674RVFQ33D Datasheet - Page 262

• Manufacturer Part Number: D12674RVFQ33D
• Description: MCU 3V 0K I-TEMP 144-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of D12674RVFQ33D

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: IrDA, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 103
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: HD6412674RVFQ33D; HD6412674RVFQ33D

Section 6 Bus Controller (BSC)
6.7.10
By setting the SDWCD bit of the DRACCR to 1, the CAS latency control cycle (T
inserted by the WTCRB register in the write access of the synchronous DRAM can be disabled.
Disabling the CAS latency control cycle can reduce the write-access cycle count as compared to
synchronous DRAM read access. Figure 6.48 shows the write access timing when the CAS latency
control cycle is disabled.
Rev. 3.00 Mar 17, 2006 page 210 of 926
REJ09B0283-0300
Figure 6.48 Example of Write Access Timing when CAS Latency Control Cycle Is Disabled
DQMU, DQML
Precharge-sel
Address bus
Bus Cycle Control in Write Cycle
SDRAM
Data bus
CKE
RAS
CAS
WE
Column address
PALL
T
p
Row address
Row address
(SDWCD = 1)
ACTV
T
r
High
NOP
T
c1
Column address
T
WRIT
c2
c1
) that is