D12674RVFQ33D Renesas Electronics America, D12674RVFQ33D Datasheet - Page 224

MCU 3V 0K I-TEMP 144-QFP

D12674RVFQ33D

Manufacturer Part Number
D12674RVFQ33D
Description
MCU 3V 0K I-TEMP 144-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheet

Specifications of D12674RVFQ33D

Core Processor
H8S/2600
Core Size
16-Bit
Speed
33MHz
Connectivity
IrDA, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
103
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
HD6412674RVFQ33D
HD6412674RVFQ33D

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
D12674RVFQ33DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 6 Bus Controller (BSC)
Figure 6.20 shows an example of the timing when the CS assertion period is extended in basic bus
3-state access space.
Both extension state T
basic bus cycle, or only one of these, can be specified for individual areas. Insertion or non-
insertion can be specified for the T
register, and for the T
Rev. 3.00 Mar 17, 2006 page 172 of 926
REJ09B0283-0300
Read
(when
RDNn = 0)
Write
Figure 6.20 Example of Timing when Chip Select Assertion Period Is Extended
Address bus
CSn
AS
RD
Data bus
HWR, LWR
Data bus
t
h
state with the lower 8 bits (CSXT7 to CSXT0).
inserted before the basic bus cycle and extension state T
h
T
state with the upper 8 bits (CSXH7 to CSXH0) in the CSACR
h
T
1
Bus cycle
T
Write data
2
Read data
T
3
t
inserted after the
T
t

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