D12674RVFQ33D Renesas Electronics America, D12674RVFQ33D Datasheet - Page 221
D12674RVFQ33D
Manufacturer Part Number
D12674RVFQ33D
Description
MCU 3V 0K I-TEMP 144-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheet
1.D12674RVFQ33V.pdf
(981 pages)
Specifications of D12674RVFQ33D
Core Processor
H8S/2600
Core Size
16-Bit
Speed
33MHz
Connectivity
IrDA, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
103
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
HD6412674RVFQ33D
HD6412674RVFQ33D
HD6412674RVFQ33D
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D12674RVFQ33DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 221 of 981
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Section 6 Bus Controller (BSC)
6.5.4
Wait Control
When accessing external space, this LSI can extend the bus cycle by inserting one or more wait
states (T
). There are two ways of inserting wait states: program wait insertion and pin wait
w
insertion using the WAIT pin.
Program Wait Insertion: From 0 to 7 wait states can be inserted automatically between the T
2
state and T
state on an individual area basis in 3-state access space, according to the settings in
3
WTCRA and WTCRB.
Pin Wait Insertion: Setting the WAITE bit to 1 in BCR enables wait input by means of the
WAIT pin. When external space is accessed in this state, a program wait is first inserted in
accordance with the settings in WTCRA and WTCRB. If the WAIT pin is low at the falling edge
state is inserted. If the WAIT pin is held low, T
of in the last T
or T
state, another T
states are
2
w
w
w
inserted until it goes high. This is useful when inserting seven or more T
states, or when changing
w
the number of T
states to be inserted for different external devices. The WAITE bit setting applies
w
to all areas. Figure 6.18 shows an example of wait state insertion timing.
The settings after a reset are: 3-state access, insertion of 7 program wait states, and WAIT input
disabled.
Rev. 3.00 Mar 17, 2006 page 169 of 926
REJ09B0283-0300
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