DF2370VFQ34V Renesas Electronics America, DF2370VFQ34V Datasheet - Page 990
![IC H8S/2370 MCU FLASH 144-LQFP](/photos/12/41/124170/df2370vfq34v_sml.jpg)
DF2370VFQ34V
Manufacturer Part Number
DF2370VFQ34V
Description
IC H8S/2370 MCU FLASH 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet
1.YR0K42378FC000BA.pdf
(1208 pages)
Specifications of DF2370VFQ34V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
34MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 6x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
For Use With
YLCDRSK2378 - KIT DEV EVAL H8S/2378 LCDYR0K42378FC000BA - KIT EVAL FOR H8S/2378HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2370VFQ34V
Manufacturer:
Exar
Quantity:
67
Company:
Part Number:
DF2370VFQ34V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 21 Flash Memory (0.18-μm F-ZTAT Version)
The FLER bit is set in the following conditions:
1. When an interrupt such as NMI occurs during programming/erasing.
2. When the flash memory is read during programming/erasing (including a vector read or an
3. When a SLEEP instruction (including software-standby mode) is executed during
4. When a bus master other than the CPU such as the DMAC or DTC gets bus mastership during
Error protection is cancelled only by a power-on reset or by hardware-standby mode. Note that the
reset should only be released after providing a reset input over a period longer than the normal 100
μs period. Since high voltages are applied during programming/erasing of the flash memory, some
voltage may remain after the error-protection state has been entered. For this reason, it is
necessary to reduce the risk of damage to the flash memory by extending the reset period so that
the charge is released.
The state-transition diagram in figure 21.15 shows transitions to and from the error-protection
state.
Rev.7.00 Mar. 18, 2009 page 922 of 1136
REJ09B0109-0700
Error occurrence
instruction fetch).
programming/erasing.
programming/erasing.
Programming/erasing
Programming/erasing disabled
enabled FLER = 0
Error protection mode
Program mode
Read disabled
Erase mode
Read enabled
FLER = 1
Figure 21.15 Transitions to Error-Protection State
Software-standby mode
software-standby mode
RES = 0 or STBY = 0
Cancel
programming/erasing disabled
RES = 0 or
STBY = 0
Error-protection mode
(Software standby)
Program/erase interface
register is in its initial state.
Programming/erasing disabled
Read disabled
(Hardware protection)
FLER = 1
Reset or standby
Read disabled
FLER = 0
Program/erase interface
register is in its initial state.
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