M38513E4FP#U0 Renesas Electronics America, M38513E4FP#U0 Datasheet - Page 48

• Manufacturer Part Number: M38513E4FP#U0
• Description: IC 740 MCU ROM 16K 42SSOP
• Manufacturer: Renesas Electronics America
• Series: 740/38000r

Specifications of M38513E4FP#U0

• Core Processor: 740
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SIO, UART/USART
• Peripherals: PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: OTP
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 42-SSOP
• Package: 42SSOP
• Family Name: 740
• Maximum Speed: 8 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 34
• Interface Type: I2C-BUS
• On-chip Adc: 5-chx10-bit
• Number Of Timers: 4
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

3851 Group
CLOCK GENERATING CIRCUIT
The 3851 group (built-in 24 KB or more ROM) has two built-in os-
cillation circuits: main clock X
clock X
formed by connecting a resonator between X
and X
nator manufacturer’s recommended values. No external resistor is
needed between X
on-chip. However, an external feed-back resistor is needed be-
tween X
Immediately after power on, only the X
oscillating, and X
Frequency Control
(1) Middle-speed mode
The internal clock
set is released, this mode is selected.
(2) High-speed mode
The internal clock
(3) Low-speed mode
The internal clock
If you switch the mode between middle/high-speed and low-
speed, stabilize both X
is required for the sub-clock to stabilize, especially immediately af-
ter power on and at returning from the stop mode. When switching
the mode between middle/high-speed and low-speed, set the fre-
quency on condition that f(X
(4) Low power dissipation mode
The low power consumption operation can be realized by stopping
the main clock X
bit 5 of the CPU mode register to “1”. When the main clock X
restarted (by setting the main clock stop bit to “0”), set sufficient
time for oscillation to stabilize.
The sub-clock X
clocks that are generated externally. Accordingly, make sure to
cause an external resonator to oscillate.
Oscillation Control
(1) Stop mode
If the STP instruction is executed, the internal clock
“H” level, and X
stabilizing time set after STP instruction released bit is “0”, the
prescaler 12 is set to “FF
oscillation stabilizing time set after STP instruction released bit is
“1”, set the sufficient time for oscillation of used oscillator to stabi-
lize since nothing is set to the prescaler 12 and timer 1.
Either X
count source. Oscillator restarts when an external interrupt is re-
ceived, but the internal clock
at “H”) until timer 1 underflows. The internal clock
the first time, when timer 1 underflows. This ensures time for the
clock oscillation using the ceramic resonators to be stabilized.
Rev.1.01
Note
COUT
CIN
CIN
IN
-X
). Use the circuit constants in accordance with the reso-
or X
and X
Oct 15, 2003
COUT
(Built-in 24 KB or more ROM)
CIN
IN
CIN
IN
CIN
COUT
and X
oscillation circuit. An oscillation circuit can be
in low-speed mode. To stop the main clock, set
IN
-X
divided by 16 is input to the prescaler 12 as
is half the frequency of X
is half the frequency of X
is the frequency of X
and X
COUT
and X
.
IN
CIN
16
and X
COUT
” and timer 1 is set to “01
oscillation circuit can not directly input
OUT
oscillation stops. When the oscillation
IN
page 46 of 89
) > 3•f(X
IN
is not supplied to the CPU (remains
CIN
since a feed-back resistor exists
pins function as I/O ports.
-X
OUT
oscillations. The sufficient time
CIN
oscillation circuit and sub
IN
).
IN
oscillation circuit starts
divided by 8. After re-
IN
CIN
.
IN
.
and X
is supplied for
16
”. When the
stops at an
OUT
(X
IN
CIN
is
When the oscillator is restarted by reset, apply “L” level to the
RESET pin until the oscillation is stable since a wait time will not
be generated.
(2) Wait mode
If the WIT instruction is executed, the internal clock
“H” level, but the oscillator does not stop. The internal clock
starts at reset or when an interrupt is received. Since the oscillator
does not stop, normal operation can be started immediately after
the clock is restarted.
To ensure that the interrupts will be received to release the STP or
WIT state, their interrupt enable bits must be set to “1” before ex-
ecuting of the STP or WIT instruction.
When releasing the STP state, the prescaler 12 and timer 1 will
start counting the clock X
timer 1 interrupt enable bit to “0” before executing the STP instruc-
tion.
When using the oscillation stabilizing time set after STP instruction
released bit set to “1”, evaluate time to stabilize oscillation of the
used oscillator and set the value to the timer 1 and prescaler 12.
Fig. 52 Ceramic resonator circuit
Fig. 53 External clock input circuit
Note
X
C I N
C
R f
C I N
X
C O U T
X
R d
C
C I N
C O U T
C
R f
C I N
X
E x t e r n a l o s c i l l a t i o n
c i r c u i t
X
V c c
V s s
C O U T
I N
R d
C
IN
C O U T
divided by 16. Accordingly, set the
X
O p e n
O U T
X
I N
C
I N
X
O U T
C
O U T
stops at an
re-