DF36054GFPJ Renesas Electronics America, DF36054GFPJ Datasheet - Page 338

MCU 3/5V 32K J-TEMP POR&LVD 64-Q

DF36054GFPJ

Manufacturer Part Number
DF36054GFPJ
Description
MCU 3/5V 32K J-TEMP POR&LVD 64-Q
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet

Specifications of DF36054GFPJ

Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SSU
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
45
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F36054GFPJ
HD64F36054GFPJ
Section 15 Controller Area Network for Tiny (TinyCAN)
15.3.5
BCR configures the CAN bit timing parameters and baud rate prescaler for the CDLC.
Rev. 4.00 Mar. 15, 2006 Page 304 of 556
REJ09B0026-0400
Bit
7
6
5
4
3
2
1
0
Bit
7
BCR0
BCR1
Bit Name
SJW1
SJW0
BRP5
BRP4
BRP3
BRP2
BRP1
BRP0
Bit Name
Bit Configuration Registers 0, 1 (BCR0, BCR1)
Initial
Value
0
0
0
0
0
0
0
0
Initial
Value
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Re-Synchronization Jump Width
These bits set the maximum value of synchronization
width.
00: 1 time quantum
01: 2 time quanta
10: 3 time quanta
11: 4 time quanta
Baud Rate Prescaler
These bits set the clock used for time quanta.
000000: Setting prohibited
000001: 2 system clocks
111111: 64 system clocks
Description
Reserved
This bit is always read as 0. The write value should
always be 0.
:
:
(BRP + 1) system clocks

Related parts for DF36054GFPJ