DF36034GFPJ Renesas Electronics America, DF36034GFPJ Datasheet - Page 77

• Manufacturer Part Number: DF36034GFPJ
• Description: MCU 3/5V 32K J-TEMP POR&LVD 64-L
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of DF36034GFPJ

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SSU
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 45
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F36034GFPJ; HD64F36034GFPJ

The timer is counting, so the value read is not necessarily the same as the value in the timer load
register. As a result, bits other than the intended bit in the timer counter may be modified and the
modified value may be written to the timer load register.
Example 2: The BSET instruction is executed for port 5.
P57 and P56 are input pins, with a low-level signal input at P57 and a high-level signal input at
P56. P55 to P50 are output pins and output low-level signals. An example to output a high-level
signal at P50 with a BSET instruction is shown below.
Input/output
Pin state
PCR5
PDR5
BSET
Prior to executing BSET instruction
BSET instruction executed instruction
Figure 2.13 Example of Timer Configuration with Two Registers Allocated to Same
#0,
P57
Input
Low
level
0
1
Count clock
@PDR5
0
0
P56
Input
High
level
P55
Output
Low
level
1
0
The BSET instruction is executed for port 5.
Timer load register
Timer counter
Address
Reload
P54
Output
Low
level
1
0
P53
Output
Low
level
1
0
Rev. 4.00 Mar. 15, 2006 Page 43 of 556
Read
Write
Internal data bus
P52
Output
Low
level
1
0
P51
Output
Low
level
1
0
REJ09B0026-0400
Section 2 CPU
P50
Output
Low
level
1
0