DF36034GFPJ Renesas Electronics America, DF36034GFPJ Datasheet - Page 411

• Manufacturer Part Number: DF36034GFPJ
• Description: MCU 3/5V 32K J-TEMP POR&LVD 64-L
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of DF36034GFPJ

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SSU
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 45
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F36034GFPJ; HD64F36034GFPJ

16.4.11 Interrupt Requests
The SSU has five interrupt requests: transmit data empty, transmit end, receive data full, overrun
error, and conflict error. Since these interrupt requests are assigned to the common vector address,
interrupt sources must be determined by flags. Table 16.3 lists the interrupt requests.
Table 16.3 Interrupt Requests
When an interrupt condition shown in table 16.3 is 1 and the I bit in CCR is 0, the CPU executes
the interrupt exception handling. Each interrupt source must be cleared during the exception
handling. Note that the TDRE and TEND bits are automatically cleared by writing transmit data in
SSTDR and the RDRF bit is automatically cleared by reading SSRDR. When transmit data is
written in SSTDR, the TDRE bit is set again at the same time. Then if the TDRE bit is cleared,
additional one byte of data may be transmitted.
Interrupt Request
Transmit data empty
Transmit end
Receive data full
Overrun error
Conflict error
Abbreviation
TXI
TEI
RXI
OEI
CEI
Section 16 Synchronous Serial Communication Unit (SSU)
Interrupt Condition
(TIE = 1), (TDRE = 1)
(TEIE = 1), (TEND = 1)
(RIE = 1), (RDRF = 1)
(RIE = 1), (ORER = 1)
(CEIE = 1), (CE = 1)
Rev. 4.00 Mar. 15, 2006 Page 377 of 556
REJ09B0026-0400