S912XEP100J5MAG Freescale Semiconductor, S912XEP100J5MAG Datasheet - Page 785

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S912XEP100J5MAG

Manufacturer Part Number
S912XEP100J5MAG
Description
MCU 64K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of S912XEP100J5MAG

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
119
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 24x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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The direction of each serial I/O pin depends on the BIDIROE bit. If the pin is configured as an output,
serial data from the shift register is driven out on the pin. The same pin is also the serial input to the shift
register.
21.4.6
The SPI has one error condition:
21.4.6.1
If the SS input becomes low while the SPI is configured as a master, it indicates a system error where more
than one master may be trying to drive the MOSI and SCK lines simultaneously. This condition is not
permitted in normal operation, the MODF bit in the SPI status register is set automatically, provided the
MODFEN bit is set.
In the special case where the SPI is in master mode and MODFEN bit is cleared, the SS pin is not used by
the SPI. In this special case, the mode fault error function is inhibited and MODF remains cleared. In case
Freescale Semiconductor
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
Bidirectional Mode
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
When SPE = 1
Normal Mode
SPC0 = 0
SPC0 = 1
The SCK is output for the master mode and input for the slave mode.
The SS is the input or output for the master mode, and it is always the input for the slave mode.
The bidirectional mode does not affect SCK and SS functions.
Mode fault error
Error Conditions
Mode Fault Error
In bidirectional master mode, with mode fault enabled, both data pins MISO
and MOSI can be occupied by the SPI, though MOSI is normally used for
transmissions in bidirectional mode and MISO is not used by the SPI. If a
mode fault occurs, the SPI is automatically switched to slave mode. In this
case MISO becomes occupied by the SPI and MOSI is not used. This must
be considered, if the MISO pin is used for another purpose.
Serial Out
Serial In
Serial Out
SPI
Serial In
Table 21-11. Normal Mode and Bidirectional Mode
SPI
MC9S12XE-Family Reference Manual Rev. 1.23
Master Mode MSTR = 1
BIDIROE
NOTE
MOMI
MOSI
MISO
Chapter 21 Serial Peripheral Interface (S12SPIV5)
Serial Out
Serial In
Serial Out
SPI
Serial In
SPI
Slave Mode MSTR = 0
BIDIROE
SISO
MOSI
MISO
785

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