S912XEP100J5MAG Freescale Semiconductor, S912XEP100J5MAG Datasheet - Page 191

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S912XEP100J5MAG

Manufacturer Part Number
S912XEP100J5MAG
Description
MCU 64K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of S912XEP100J5MAG

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
119
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 24x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 3
Memory Mapping Control (S12XMMCV4)
3.1
This section describes the functionality of the module mapping control (MMC) sub-block of the S12X
platform. The block diagram of the MMC is shown in
The MMC module controls the multi-master priority accesses, the selection of internal resources and
external space. Internal buses, including internal memories and peripherals, are controlled in this module.
The local address space for each master is translated to a global memory space.
Freescale Semiconductor
Revision
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
Number
V04.04
V04.05
V04.06
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Introduction
Revision Date
15 Nov 2006
26 Oct 2005
26 Jul 2006
3.4.2.4/3-216
MC9S12XE-Family Reference Manual , Rev. 1.23
Sections
Affected
Table 3-1. Revision History
- Reorganization of MEMCTL0 register bits.
- Updated XGATE Memory Map
- Adding AUTOSAR Compliance concerning illegal CPU accesses
Figure
3-1.
Description of Changes
191

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