S912XEP100J5MAG Freescale Semiconductor, S912XEP100J5MAG Datasheet - Page 773

• Manufacturer Part Number: S912XEP100J5MAG
• Description: MCU 64K FLASH 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S912XEP100J5MAG

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 50MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 119
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 24x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Freescale Semiconductor
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indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
1. Data in SPIDRH is lost in this case.
2. SPIDRH can be read repeatedly without any effect on SPIF. SPIF Flag is cleared only by the read
1. Any write to SPIDRH or SPIDRL with SPTEF == 0 is effectively ignored.
2. Data in SPIDRH is undefined in this case.
3. SPIDRH can be written repeatedly without any effect on SPTEF. SPTEF Flag is cleared only by
XFRW Bit
XFRW Bit
of SPIDRL after reading SPISR with SPIF == 1.
writing to SPIDRL after reading SPISR with SPTEF == 1.
0
1
0
1
Read SPISR with SPTEF == 1 then
Read SPISR with SPTEF == 1
Read SPISR with SPIF == 1
Read SPISR with SPIF == 1
Table 21-10. SPTEF Interrupt Flag Clearing Sequence
Table 21-9. SPIF Interrupt Flag Clearing Sequence
MC9S12XE-Family Reference Manual Rev. 1.23
SPTEF Interrupt Flag Clearing Sequence
SPIF Interrupt Flag Clearing Sequence
then
then
then
Byte Write to SPIDRH
Byte Read SPIDRH
Word Write to (SPIDRH:SPIDRL)
Word Read (SPIDRH:SPIDRL)
Byte Write to SPIDRL
Byte Read SPIDRL
Write to SPIDRL
Chapter 21 Serial Peripheral Interface (S12SPIV5)
Read SPIDRL
1(3)
or
or
(2)
or
or
Byte Write to SPIDRL
Byte Read SPIDRL
(1)
1(2)
(1)
1
1
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