HD6417020SX20IV Renesas Electronics America, HD6417020SX20IV Datasheet - Page 84

• Manufacturer Part Number: HD6417020SX20IV
• Description: SH 1 CORE 32B MPU, 20MHZ/5V, 100
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7020r

Specifications of HD6417020SX20IV

• Core Processor: SH-1
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

5.1.3
INTC pins are summarized in table 5.1.
Table 5.1
Name
Nonmaskable interrupt input
pin
Interrupt request input pins
Interrupt request output pin
5.1.4
The interrupt controller has six registers as listed in table 5.2. These registers are used for setting
interrupt priority levels and controlling the detection of external interrupt input signals.
Table 5.2
Name
Interrupt priority register A
Interrupt priority register B
Interrupt priority register C
Interrupt priority register D
Interrupt priority register E
Interrupt control register
Note:
5.2
There are four types of interrupt sources: NMI, user break, IRQ, and on-chip peripheral module
interrupts.
Interrupt rankings are expressed as priority levels (0–16), with 0 the lowest and 16 the highest. An
interrupt set to level 0 is masked.
1. H'8000 when pin NMI is high, H'0000 when pin NMI is low.
2. Only the values of bits A27–A24 and A8–A0 are valid; bits A23–A9 are ignored. For
Pin Configuration
Registers
Interrupt Sources
details on the register addresses, see section 8.3.5, Description of Areas.
INTC Pin Configuration
Interrupt Controller Register Configuration
Abbr.
NMI
IRQ0–IRQ7
IRQOUT
Abbr.
IPRA
IPRB
IPRC
IPRD
IPRE
ICR
R/W
R/W
R/W
R/W
R/W
R/W
R/W
I/O
I
I
O
Address*
H'5FFFF84
H'5FFFF86
H'5FFFF88
H'5FFFF8A
H'5FFFF8C
H'5FFFF8E
Function
Inputs a non-maskable interrupt request
signal
Inputs maskable interrupt request signals
Outputs a signal indicating an interrupt
source has occurred.
2
Initial Value
H'0000
H'0000
H'0000
H'0000
H'0000
*1
Bus width
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
RENESAS 63