HD6417020SX20IV Renesas Electronics America, HD6417020SX20IV Datasheet - Page 293

SH 1 CORE 32B MPU, 20MHZ/5V, 100

HD6417020SX20IV

Manufacturer Part Number
HD6417020SX20IV
Description
SH 1 CORE 32B MPU, 20MHZ/5V, 100
Manufacturer
Renesas Electronics America
Series
SuperH® SH7020r
Datasheet

Specifications of HD6417020SX20IV

Core Processor
SH-1
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Complementary PWM Mode: When the count direction of TCNT3 and TCNT4 change, the BR
value is transferred to the GR. The following timing is employed for this transfer:
Reset-Synchronized PWM Mode: The BR value is transferred to GR upon a GRA3 compare
match.
Procedure for Selecting the Buffer Mode (figure 10.47):
1. Set the TIOR to select the output compare or input capture function of the GR.
2. Set bits BFA3, BFB3 and BFB4 in the TFCR to select the buffer mode for the GR.
3. Set the STR bit in the TSTR to 1 to start the TCNT counting.
Whenever TCNT3 and GRA3 compare-match
Whenever TCNT4 underflows
Input capture signal
BR
Figure 10.47 Procedure for Selecting the Buffer Mode
Figure 10.46 Input Capture Buffer Operation
Select general register function
Select buffer mode
Start counting
Buffer mode
Buffer mode
GR
(1)
(2)
(3)
RENESAS 275
TCNT

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