C8051F521A-IM Silicon Laboratories Inc, C8051F521A-IM Datasheet - Page 171

• Manufacturer Part Number: C8051F521A-IM
• Description: IC 8051 MCU 8K FLASH 10DFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F52xr

Specifications of C8051F521A-IM

• Program Memory Type: FLASH
• Program Memory Size: 8KB (8K x 8)
• Package / Case: 10-DFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 6
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.25 V
• Data Converters: A/D 6x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Processor Series: C8051F5x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SPI/UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 6
• Number Of Timers: 3
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F500DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 6-ch x 12-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1488 - KIT DEV C8051F53XA, C8051F52XA770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1455 - ADAPTER PROGRAM TOOLSTICK F520
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1490-5

17.7. LIN Registers
The following Special Function Registers (SFRs) are available:
17.7.1. LIN Direct Access SFR Registers Definition
SFR Definition 17.1. LINADDR: Indirect Address Register
SFR Definition 17.2. LINDATA: LIN Data Register
Bit7–0:
Bit7–0:
R/W
R/W
Bit7
Bit7
LINADDR7-0: LIN Indirect Address Register Bits.
This register hold an 8-bit address used to indirectly access the LIN0 core registers.
Table 17.4 lists the LIN0 core registers and their indirect addresses. Reads and writes to
LINDATA will target the register indicated by the LINADDR bits.
LINDATA7-0: LIN Indirect Data Register Bits.
When this register is read, it will read the contents of the LIN0 core register pointed to by
LINADDR.
When this register is written, it will write the value to the LIN0 core register pointed to by LIN-
ADDR.
R/W
R/W
Bit6
Bit6
R/W
R/W
Bit5
Bit5
R/W
R/W
Bit4
Bit4
C8051F52x/F52xA/F53x/F53xA
Rev. 1.3
R/W
R/W
Bit3
Bit3
R/W
R/W
Bit2
Bit2
R/W
R/W
Bit1
Bit1
SFR Address:
SFR Address:
R/W
R/W
Bit0
Bit0
00000000
00000000
Reset Value
Reset Value
0x92
0x93
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