C8051F521A-IM Silicon Laboratories Inc, C8051F521A-IM Datasheet - Page 149

IC 8051 MCU 8K FLASH 10DFN

C8051F521A-IM

Manufacturer Part Number
C8051F521A-IM
Description
IC 8051 MCU 8K FLASH 10DFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F52xr
Datasheets

Specifications of C8051F521A-IM

Program Memory Type
FLASH
Program Memory Size
8KB (8K x 8)
Package / Case
10-DFN
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
6
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.25 V
Data Converters
A/D 6x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
C8051F5x
Core
8051
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SPI/UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
6
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F500DK
Minimum Operating Temperature
- 40 C
On-chip Adc
6-ch x 12-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1488 - KIT DEV C8051F53XA, C8051F52XA770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1455 - ADAPTER PROGRAM TOOLSTICK F520
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1490-5
SFR Definition 15.2. SBUF0: Serial (UART0) Port Data Buffer
Table 15.1. Timer Settings for Standard Baud Rates 
Using the Internal Oscillator
Bits7–0: SBUF0[7:0]: Serial Data Buffer Bits 7–0 (MSB–LSB)
R/W
Bit7
Frequency: 24.5 MHz
Target
Baud Rate
(bps)
This SFR accesses two registers; a transmit shift register and a receive latch register. When
data is written to SBUF0, it goes to the transmit shift register and is held for serial transmis-
sion. Writing a byte to SBUF0 initiates the transmission. A read of SBUF0 returns the con-
tents of the receive latch.
230400
115200
57600
28800
14400
9600
2400
1200
R/W
Bit6
Baud Rate
% Error
X = Don’t care
Note: SCA1
–0.32%
–0.32%
–0.32%
–0.32%
–0.32%
0.15%
0.15%
0.15%
R/W
Bit5
SCA0 and T1M bit definitions can be found in Section 18.1.
Oscillator
Divide
Factor
R/W
Bit4
10176
20448
C8051F52x/F52xA/F53x/F53xA
1704
2544
106
212
426
848
Rev. 1.3
Timer Clock
Source
SYSCLK / 12
SYSCLK / 12
SYSCLK / 48
SYSCLK / 48
R/W
SYSCLK / 4
Bit3
SYSCLK
SYSCLK
SYSCLK
R/W
Bit2
SCA1–SCA0
(pre-scale
select)*
XX
XX
XX
01
00
00
10
10
R/W
Bit1
SFR Address:
T1M* Timer 1
R/W
Bit0
1
1
1
0
0
0
0
0
Reload
Value (hex)
00000000
Reset Value
0xCB
0x96
0x2B
0x96
0xB9
0x2B
0x96
0x96
0x99
149

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