S9S08SG16E1MTJ Freescale Semiconductor, S9S08SG16E1MTJ Datasheet - Page 24

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S9S08SG16E1MTJ

Manufacturer Part Number
S9S08SG16E1MTJ
Description
MCU 16K FLASH 20-TSSOP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of S9S08SG16E1MTJ

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LVD. POR, PWM, WDT
Number Of I /o
16
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-TSSOP
Processor Series
S08SG
Core
HCS08
Data Bus Width
8 bit
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08SG32, DEMO9S08SG32AUTO, DEMO9S08SG8, DEMO9S08SG8AUTO
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S9S08SG16E1MTJ
Manufacturer:
FREESCALE
Quantity:
20 000
EXTAL
* The fixed frequency clock (FFCLK) is internally
synchronized to the bus clock and must not exceed one half
of the bus clock frequency.
Chapter 1 Device Overview
1.3
Figure 1-2
inputs as shown. The clock inputs to the modules indicate the clock(s) that are used to drive the module
function.
The following defines the clocks used in this MCU:
24
XOSC
1 kHZ
LPO
ICS
XTAL
BUSCLK — The frequency of the bus is always half of ICSOUT.
ICSOUT — Primary output of the ICS and is twice the bus frequency.
ICSLCLK — Development tools can select this clock source to speed up BDC communications in
systems where the bus clock is configured to run at a very slow frequency.
ICSERCLK — External reference clock can be selected as the RTC clock source and as the
alternate clock for the ADC module.
ICSIRCLK — Internal reference clock can be selected as the RTC clock source.
ICSFFCLK — Fixed frequency clock can be selected as clock source for the TPM1, TPM2 and
MTIM modules.
LPOCLK — Independent 1-kHz clock source that can be selected as the clock source for the COP
and RTC modules.
TCLK — External input clock source for TPM1, TPM2 and MTIM and is referenced as TPMCLK
in TPM chapters.
System Clock Distribution
shows a simplified clock connection diagram. Some modules in the MCU have selectable clock
LPOCLK
ICSERCLK
ICSFFCLK
ICSIRCLK
ICSOUT
ICSLCLK
CPU
÷
÷
2
2
BUSCLK
Figure 1-2. System Clock Distribution Diagram
RTC
SYNC*
COP
MC9S08SG32 Data Sheet, Rev. 8
TCLK
BDC
TPM1
FFCLK*
TPM2
ADC has min and max
frequency
requirements.See the
ADC chapter and
electricals appendix for
details.
MTIM
ADC
SCI
IIC
SPI
Freescale Semiconductor
FLASH has frequency
requirements for program
and erase operation. See
the electricals appendix
for details.
FLASH

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