S9S08SG16E1MTJ Freescale Semiconductor, S9S08SG16E1MTJ Datasheet - Page 124

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S9S08SG16E1MTJ

Manufacturer Part Number
S9S08SG16E1MTJ
Description
MCU 16K FLASH 20-TSSOP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of S9S08SG16E1MTJ

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LVD. POR, PWM, WDT
Number Of I /o
16
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-TSSOP
Processor Series
S08SG
Core
HCS08
Data Bus Width
8 bit
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08SG32, DEMO9S08SG32AUTO, DEMO9S08SG8, DEMO9S08SG8AUTO
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S9S08SG16E1MTJ
Manufacturer:
FREESCALE
Quantity:
20 000
1
2
Chapter 9 Analog-to-Digital Converter (S08ADC10V1)
9.1.2
References to V
9.1.3
The ADC module is capable of performing conversions using the MCU bus clock, the bus clock divided
by two, the local asynchronous clock (ADACK) within the module, or the alternate clock, ALTCLK. The
alternate clock for the MC9S08SG32 Series MCU devices is the external reference clock (ICSERCLK).
The selected clock source must run at a frequency such that the ADC conversion clock (ADCK) runs at a
frequency within its specified range (f
determined by the ADIV bits.
ALTCLK is active while the MCU is in wait mode provided the conditions described above are met. This
allows ALTCLK to be used as the conversion clock source for the ADC while the MCU is in wait mode.
ALTCLK cannot be used as the ADC conversion clock source while the MCU is in either stop2 or stop3.
9.1.4
The ADC hardware trigger, ADHWT, is the output from the real time counter (RTC). The RTC counter
can be clocked by either ICSERCLK, ICSIRCLK or a nominal 1 kHz clock source.
The period of the RTC is determined by the input clock frequency, the RTCPS bits, and the RTCMOD
register. When the ADC hardware trigger is enabled, a conversion is initiated upon an RTC counter
overflow. The RTIE does not have to be set for RTC to cause a hardware trigger.
The RTC can be configured to cause a hardware trigger in MCU run, wait, and stop3.
9.1.5
To use the on-chip temperature sensor, the user must perform the following:
124
For information, see
Requires BGBE =1 in SPMSC1 see
For value of bandgap voltage reference see
ADCH
01111
Configure ADC for long sample with a maximum of 1 MHz clock
Convert the bandgap voltage reference channel (AD27)
— By converting the digital value of the bandgap voltage reference channel using the value of
Convert the temperature sensor channel (AD26)
V
Characteristics”.
Analog Power and Ground Signal Names
Alternate Clock
Hardware Trigger
Temperature Sensor
BG
Channel
AD15
DDAD
the user can determine V
Section 9.1.5, “Temperature
and V
SSAD
Table 9-1. ADC Channel Assignment (continued)
PTC7/ADP15
Section 5.7.6, “System Power Management Status and Control 1 Register
Input
in this chapter correspond to signals V
ADCK
MC9S08SG32 Data Sheet, Rev. 8
A.6, “DC
DD
Sensor”.
) after being divided down from the ALTCLK input as
. For value of bandgap voltage, see
Characteristics”.
ADCH
11111
Module Disabled
DDA
Channel
and V
Section A.6, “DC
SSA
Freescale Semiconductor
, respectively.
Input
None
(SPMSC1)”.

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