S9S08SG16E1MTJ Freescale Semiconductor, S9S08SG16E1MTJ Datasheet - Page 131

• Manufacturer Part Number: S9S08SG16E1MTJ
• Description: MCU 16K FLASH 20-TSSOP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of S9S08SG16E1MTJ

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, LIN, SCI, SPI
• Peripherals: LVD. POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 20-TSSOP
• Processor Series: S08SG
• Core: HCS08
• Data Bus Width: 8 bit
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08SG32, DEMO9S08SG32AUTO, DEMO9S08SG8, DEMO9S08SG8AUTO
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

9.3.2
The ADCSC2 register controls the compare function, conversion trigger, and conversion active of the ADC
module.
Freescale Semiconductor
ADTRG
ADACT
Field
1
7
6
Bits 1 and 0 are reserved bits that must always be written to 0.
Reset:
W
R
Status and Control Register 2 (ADCSC2)
Conversion Active — Indicates that a conversion is in progress. ADACT is set when a conversion is initiated
and cleared when a conversion is completed or aborted.
0 Conversion not in progress
1 Conversion in progress
Conversion Trigger Select — Selects the type of trigger used for initiating a conversion. Two types of triggers
are selectable: software trigger and hardware trigger. When software trigger is selected, a conversion is initiated
following a write to ADCSC1. When hardware trigger is selected, a conversion is initiated following the assertion
of the ADHWT input.
0 Software trigger selected
1 Hardware trigger selected
ADACT
7
0
ADCH
00100
00101
00110
00111
01000
01001
01010
01011
01100
01101
01110
01111
= Unimplemented or Reserved
ADTRG
Figure 9-4. Status and Control Register 2 (ADCSC2)
0
6
Table 9-5. ADCSC2 Register Field Descriptions
Table 9-4. Input Channel Select (continued)
Input Select
ACFE
MC9S08SG32 Data Sheet, Rev. 8
0
5
AD10
AD11
AD12
AD13
AD14
AD15
AD4
AD5
AD6
AD7
AD8
AD9
ACFGT
0
4
Description
0
0
3
Chapter 9 Analog-to-Digital Converter (S08ADC10V1)
ADCH
10100
10101
10110
10111
11000
11001
11010
11011
11100
11101
11110
11111
0
0
2
R
0
1
1
Module disabled
Input Select
Reserved
V
V
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
REFH
REFL
R
0
0
1
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