ST10F272M-4QR3 STMicroelectronics, ST10F272M-4QR3 Datasheet - Page 31

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ST10F272M-4QR3

Manufacturer Part Number
ST10F272M-4QR3
Description
MCU 16BIT 256K FLASH 144-PQFP
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet

Specifications of ST10F272M-4QR3

Core Processor
ST10
Core Size
16-Bit
Speed
40MHz
Connectivity
ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
20K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
144-MQFP, 144-PQFP
Processor Series
ST10F27x
Core
ST10
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Part Number:
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0
ST10F272M
5.4.3
5.4.4
Flash control register 1 low (FCR1L)
The Flash control register 1 Low (FCR1L), together with Flash control register 1 high
(FCR1H), is used to select the sectors to erase, or during any write operation to monitor the
status of each sector and bank.
FCR1L (0x08 0004)
Table 9.
Flash control register 1 high (FCR1H)
The Flash control register 1 high (FCR1H), together with Flash control register 1 low
(FCR1L), is used to select the sectors to erase, or during any write operation to monitor the
status of each sector and bank.
FCR1H (0x08 0006)
Table 10.
During any erase operation, this bit is automatically set and gives the status of the bank 0.
The meaning of B0Fy bit for sector y of bank 0 is given in
status bits
errors are detected.
7:0
Bit
Bit
8
15
15
B0F[7:0]
14
14
Name
Name
B0S
meaning.
Flash control register 1 low
Flash control register 1 high
13
13
Reserved
Bank 0 IFlash sectors 7-0 status
These bits must be set during a sector erase operation to select the sectors to
erase in bank 0. Moreover, during any erase operation, these bits are
automatically set and give the status of the eight sectors of Bank 0 (B0F7-B0F0).
The meaning of B0Fy bit for sector y of bank 0 is given in
and sectors (BxFy) status bits
end of a write operation if no errors are detected.
Bank 0 status (IFlash)
During any erase operation, this bit is automatically modified and gives the status
of the bank 0. The meaning of B0Fy bit for sector y of bank 0 is given in
Banks (BxS) and sectors (BxFy) status bits
reset at the end of an erase operation if no errors are detected.
Reserved
These bits are automatically reset at the end of an erase operation if no
12
12
-
-
11
11
10
10
9
9
FCR
FCR
B0S
RS
8
8
meaning. These bits are automatically reset at the
B0F7 B0F6 B0F5 B0F4 B0F3 B0F2 B0F1 B0F0
RS
7
7
Function
Function
Table 11: Banks (BxS) and sectors (BxFy)
RS
6
6
meaning. This bit is automatically
RS
5
5
Reserved
RS
4
4
Internal Flash memory
-
Table 11: Banks (BxS)
RS
3
3
Reset value: 0000h
Reset value: 0000h
RS
2
2
RS
Table 11:
1
1
31/176
RS
0
0

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