ST10F272M-4QR3 STMicroelectronics, ST10F272M-4QR3 Datasheet - Page 175

• Manufacturer Part Number: ST10F272M-4QR3
• Description: MCU 16BIT 256K FLASH 144-PQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F272M-4QR3

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 20K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-MQFP, 144-PQFP
• Processor Series: ST10F27x
• Core: ST10
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

ST10F272M
27
Revision history
Table 79.
09-May-2007
04-Jan-2008
Date
Document revision history
Revision
1
2
Initial release
Changed document status from Preliminary Data to
Memory organization on page
4Kbytes
Table 2: Summary of IFlash address range on page
B0TF from 8 to 4Kbytes
Figure 5: Flash structure on page
4Kbytes
Table 5: Flash modules sectorization (write operations or with
ROMS1 = ‘1’ or bootstrap mode) on page
size (8 to 4Kbytes)
Section 14: A/D converter on page
cycles’ with ‘40630 CPU clock cycles’ in end of section
Table 52: Absolute maximum ratings on page
from “-0.3 to V
Table 53: Recommended operating conditions on page
missing V
Table 56: DC characteristics on page
from 200µA to 150µA
Table 61: On-chip clock generator selections on page
- changed external clock input range for f
- changed external clock input range for f
- changed external clock input range for f
- changed configuration from f
Table 62: Internal PLL divider mechanism on page
- changed external clock input range for f
- changed external clock input range for f
Table 76: PQFP144 mechanical data on page 172
mechanical data on page
converted to 4 decimal places
AREF
DD
values.
” to “-0.5 to V
173: Package mechanical data for inches
XTAL
DD
21: Changed size of B0TF from 8 to
Changes
+ 0.5”
25: Changed Test-Flash size from 8 to
x 16 to Reserved
66: Replaced ‘40.630 CPU clock
126: Changed max value for I
XTAL
XTAL
XTAL
XTAL
XTAL
26: Changed B0TF address and
123: Changed V
x 8
x 1
x 10
x 3
x 8
and
145:
DatasheetSection 4:
21: Changed size of
142:
Table 77: LQFP144
Revision history
124: Added
AREF
175/176
PD1
value