ST92F124V1QB STMicroelectronics, ST92F124V1QB Datasheet - Page 371
![IC MCU 8BIT 128K MEMORY 100-PQFP](/photos/6/81/68170/497-100-pqfp_series_sml.jpg)
ST92F124V1QB
Manufacturer Part Number
ST92F124V1QB
Description
IC MCU 8BIT 128K MEMORY 100-PQFP
Manufacturer
STMicroelectronics
Series
ST9r
Datasheet
1.ST92F150CV1TB.pdf
(429 pages)
Specifications of ST92F124V1QB
Core Processor
ST9
Core Size
8/16-Bit
Speed
24MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
77
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
100-QFP
Processor Series
ST92F12x
Core
ST9
Data Bus Width
8 bit, 16 bit
Data Ram Size
4 KB
Interface Type
CAN, I2C, SCI, SPI
Maximum Clock Frequency
24 MHz
Number Of Programmable I/os
80
Number Of Timers
16 bit
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST92F150-EPB
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ST92F124V1QB
Manufacturer:
MAXIM
Quantity:
56
Company:
Part Number:
ST92F124V1QB
Manufacturer:
STMicroelectronics
Quantity:
10 000
Part Number:
ST92F124V1QB
Manufacturer:
ST
Quantity:
20 000
- Current page: 371 of 429
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REGISTER DESCRIPTION (Cont’d)
CHANNEL B LOWER THRESHOLD LOW
REGISTER (LTBLR)
R247 - Read/Write
Register Page: 63
Reset Value: xx00 0000
Bits 7:6 = LTB.[1:0]: Channel B [1:0] bit Lower
Threshold
Bits 5:0 = Reserved, forced by hardware to 0.
UPPER THRESHOLD REGISTERS (UTiHR/
UTiLR)
The two pairs of Upper Threshold High/Low Reg-
isters are used to store the user programmable up-
per threshold 10-bit values, to be compared with
the current conversion results, thus setting the up-
per window limit.
CHANNEL A UPPER THRESHOLD HIGH REG-
ISTER (UTAR)
R248 - Read/Write
Register Page: 63
Reset Value: undefined
Bits 7:0 = UTA.[9:2]: Channel 6 [9:2] bit Upper
Threshold value
UTA.9 UTA.8 UTA.7 UTA.6 UTA.5 UTA.4 UTA.3 UTA.2
LTB.1 LTB.0
7
7
0
0
0
0
0
10-BIT ANALOG TO DIGITAL CONVERTER (ADC)
0
0
0
CHANNEL A UPPER THRESHOLD LOW
REGISTER (UTALR)
R249 - Read/Write
Register Page: 63
Reset Value: xx00 0000
Bits 7:6 = UTA.[1:0]: Channel A [1:0] bit Upper
Threshold
Bits 5:0 = Reserved, forced by hardware to 0.
CHANNEL B UPPER THRESHOLD HIGH REG-
ISTER (UTBHR)
R250 - Read/Write
Register Page: 63
Reset Value: undefined
Bits 7:0 = UTB.[9:2]: Channel B [9:2] bit Upper
Threshold
CHANNEL B UPPER THRESHOLD LOW
REGISTER (UTBLR)
R251 - Read/Write
Register Page: 63
Reset Value: xx00 0000
Bits 7:6 = UTB.[1:0]: Channel B [1:0] bit Lower
Threshold
Bits 5:0 = Reserved, forced by hardware to 0.
UTA.1 UTA.0
UTB.9 UTB.8 UTB.7 UTB.6 UTB.5 UTB.4 UTB.3 UTB.2
UTB.1 UTB.0
7
7
7
0
0
0
0
0
0
0
0
0
0
371/429
0
0
0
0
0
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