ST92F124V1QB STMicroelectronics, ST92F124V1QB Datasheet - Page 233
![IC MCU 8BIT 128K MEMORY 100-PQFP](/photos/6/81/68170/497-100-pqfp_series_sml.jpg)
ST92F124V1QB
Manufacturer Part Number
ST92F124V1QB
Description
IC MCU 8BIT 128K MEMORY 100-PQFP
Manufacturer
STMicroelectronics
Series
ST9r
Datasheet
1.ST92F150CV1TB.pdf
(429 pages)
Specifications of ST92F124V1QB
Core Processor
ST9
Core Size
8/16-Bit
Speed
24MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
77
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
100-QFP
Processor Series
ST92F12x
Core
ST9
Data Bus Width
8 bit, 16 bit
Data Ram Size
4 KB
Interface Type
CAN, I2C, SCI, SPI
Maximum Clock Frequency
24 MHz
Number Of Programmable I/os
80
Number Of Timers
16 bit
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST92F150-EPB
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ST92F124V1QB
Manufacturer:
MAXIM
Quantity:
56
Company:
Part Number:
ST92F124V1QB
Manufacturer:
STMicroelectronics
Quantity:
10 000
Part Number:
ST92F124V1QB
Manufacturer:
ST
Quantity:
20 000
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MULTIPROTOCOL SERIAL COMMUNICATIONS INTERFACE (Cont’d)
CHARACTER
(CHCR)
R250 - Read/Write
Reset value: undefined
Bit 7 = AM: Address Mode.
This bit, together with the AMEN bit (in the IDPR
register), decodes the desired addressing/9th data
bit/character match operation. Please refer to the
table in the IDPR register description.
Bit 6 = EP: Even Parity.
0: Select odd parity (when parity is enabled).
1: Select even parity (when parity is enabled).
Bit 5 = PEN: Parity Enable.
0: No parity bit.
1: Parity bit generated (transmit data) or checked
Note: If the address/9th bit is enabled, the parity
bit will precede the address/9th bit (the 9th bit is
never included in the parity calculation).
AM
(received data).
7
EP
PEN
CONFIGURATION
AB
MULTIPROTOCOL SERIAL COMMUNICATIONS INTERFACE (SCI-M)
SB1
SB0
REGISTER
WL1
WL0
0
Bit 4 = AB: Address/9th Bit.
0: No Address/9th bit.
1: Address/9th bit included in the character format
Bit 3:2 = SB[1:0]: Number of Stop Bits..
Bit 1:0 = WL[1:0]: Number of Data Bits
between the parity bit and the first stop bit. This
bit can be used to address the SCI or as a ninth
data bit.
SB1
0
0
1
1
WL1
0
0
1
1
SB0
0
1
0
1
in 16X mode
WL0
0
1
0
1
Number of stop bits
1.5
2.5
1
2
Data Length
in 1X mode
5 bits
6 bits
7 bits
8 bits
1
2
2
3
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