ST92F124V1QB STMicroelectronics, ST92F124V1QB Datasheet - Page 138

• Manufacturer Part Number: ST92F124V1QB
• Description: IC MCU 8BIT 128K MEMORY 100-PQFP
• Manufacturer: STMicroelectronics
• Series: ST9r

Specifications of ST92F124V1QB

• Core Processor: ST9
• Core Size: 8/16-Bit
• Speed: 24MHz
• Connectivity: I²C, LIN, SCI, SPI
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 77
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 100-QFP
• Processor Series: ST92F12x
• Core: ST9
• Data Bus Width: 8 bit, 16 bit
• Data Ram Size: 4 KB
• Interface Type: CAN, I2C, SCI, SPI
• Maximum Clock Frequency: 24 MHz
• Number Of Programmable I/os: 80
• Number Of Timers: 16 bit
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST92F150-EPB
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ST92F124/F150/F250 - RESET AND CLOCK CONTROL UNIT (RCCU)
7.5 CRYSTAL OSCILLATOR
The on-chip components for the crystal oscillator
are an inverting circuit, polarised at the trip point.
The inverter is built around an n-channel transis-
tor, loaded with a current source and polarised
through a feedback resistor.
The current source is tailored to obtain a pseudo
sinusoidal signal at OSCOUT and OSCIN, reduc-
ing the electromagnetic emission. The inverter
stage is followed by a matching inverter, which is
followed in turn by a schmitt-triggered buffer.
In HALT mode, set by means of the HALT instruc-
tion, in STOP mode, and under control of the XT-
STOP bit, the oscillator is disabled. The current
sources are switched off, reducing the power dis-
sipation. The internal clock, CLOCK1, is forced to
a high level.
To exit the HALT condition and restart the oscilla-
tor, an external RESET pulse is required, having a
a minimum duration of T
Section 11 ELECTRICAL
It should be noted that, if the Watchdog function is
enabled, a HALT instruction will not disable the os-
cillator. This to avoid stopping the Watchdog if a
HALT code is executed in error. When this occurs,
the CPU will be reset when the Watchdog times
out or when an external reset is applied.
Figure 66. Crystal Oscillator
138/429
9
*Rd can be inserted to reduce the drive level,
when using low drive crystals
h
C
1
OSCIN
i
CRYSTAL CLOCK
l
d i
ST9
STUP
CHARACTERISTICS).
OSCOUT
t l
(see
.
Rd *
Figure 70
C
2
and
Table 31. Maximum R
Legend:
C
OSCOUT (the value includes the external capacitance
tied to the pin plus the parasitic capacitance of the board
and of the device)
Note: The tables are relative to the fundamental quartz
crystal only (not ceramic resonator).
Figure 67. Internal Oscillator Schematic
Figure 68. External Clock
C
Freq.
5 MHz
4 MHz
3 MHz
1
OSCIN
, C
1
=C
R
CLOCK
INPUT
2
POL
: Maximum Total Capacitances on pins OSCIN and
2
I
LOAD
EXTERNAL CLOCK
OSCOUT
OSCIN
OSCOUT
S
33pF
ST9
120
220
80
V
values
DD
VR02116B
22pF
130
200
370
CLOCK1