ST92F124V1QB STMicroelectronics, ST92F124V1QB Datasheet - Page 249
![IC MCU 8BIT 128K MEMORY 100-PQFP](/photos/6/81/68170/497-100-pqfp_series_sml.jpg)
ST92F124V1QB
Manufacturer Part Number
ST92F124V1QB
Description
IC MCU 8BIT 128K MEMORY 100-PQFP
Manufacturer
STMicroelectronics
Series
ST9r
Datasheet
1.ST92F150CV1TB.pdf
(429 pages)
Specifications of ST92F124V1QB
Core Processor
ST9
Core Size
8/16-Bit
Speed
24MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
77
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
100-QFP
Processor Series
ST92F12x
Core
ST9
Data Bus Width
8 bit, 16 bit
Data Ram Size
4 KB
Interface Type
CAN, I2C, SCI, SPI
Maximum Clock Frequency
24 MHz
Number Of Programmable I/os
80
Number Of Timers
16 bit
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST92F150-EPB
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ST92F124V1QB
Manufacturer:
MAXIM
Quantity:
56
Company:
Part Number:
ST92F124V1QB
Manufacturer:
STMicroelectronics
Quantity:
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Part Number:
ST92F124V1QB
Manufacturer:
ST
Quantity:
20 000
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ASYNCHRONOUS SERIAL COMMUNICATIONS INTERFACE (Cont’d)
EXTENDED RECEIVE PRESCALER DIVISION
REGISTER (SCIERPR)
R245 - Read/Write
Register Page: 26
Reset Value: 0000 0000 (00h)
Allows setting of the Extended Prescaler rate divi-
sion factor for the receive circuit.
Bits 7:1 = ERPR[7:0] 8-bit Extended Receive
Prescaler Register.
The extended Baud Rate Generator is activated
when a value different from 00h is stored in this
register. Therefore the clock frequency issued
from the 16 divider (see
the binary factor set in the SCIERPR register (in
the range 1 to 255).
The extended Baud Rate Generator is not used af-
ter a reset.
ERPR7 ERPR6 ERPR5 ERPR4 ERPR3 ERPR2 ERPR1 ERPR0
7
ASYNCHRONOUS SERIAL COMMUNICATIONS INTERFACE (SCI-A)
Figure
119) is divided by
0
EXTENDED TRANSMIT PRESCALER DIVISION
REGISTER (SCIETPR)
R246 - Read/Write
Register Page: 26
Reset Value:0000 0000 (00h)
Allows setting of the External Prescaler rate divi-
sion factor for the transmit circuit.
Bits 7:1 = ETPR[7:0] 8-bit Extended Transmit
Prescaler Register.
The extended Baud Rate Generator is activated
when a value different from 00h is stored in this
register. Therefore the clock frequency issued
from the 16 divider (see
the binary factor set in the SCIETPR register (in
the range 1 to 255).
The extended Baud Rate Generator is not used af-
ter a reset.
10.6.6 Important Notes on SCI-A
Refer to
13.5 on page
ETPR7 ETPR6 ETPR5 ETPR4 ETPR3 ETPR2 ETPR1 ETPR0
7
Section 13.4 on page 413
413.
Figure
119) is divided by
and
Section
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